--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=4 LPM_WIDTH=1 LPM_WIDTHS=2 data result sel
--VERSION_BEGIN 6.0 cbx_lpm_mux 2006:01:09:11:16:16:SJ cbx_mgl 2006:04:14:11:14:36:SJ  VERSION_END


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--synthesis_resources = lut 2 
SUBDESIGN mux_rab
( 
	data[3..0]	:	input;
	result[0..0]	:	output;
	sel[1..0]	:	input;
) 
VARIABLE 
	result_node[0..0]	: WIRE;
	sel_node[1..0]	: WIRE;
	w_data70w[3..0]	: WIRE;
	w_result85w	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( (((w_data70w[1..1] & sel_node[0..0]) & (! w_result85w)) # (w_result85w & (w_data70w[3..3] # (! sel_node[0..0])))));
	sel_node[] = ( sel[1..0]);
	w_data70w[] = ( data[3..0]);
	w_result85w = (((w_data70w[0..0] & (! sel_node[1..1])) & (! sel_node[0..0])) # (sel_node[1..1] & (sel_node[0..0] # w_data70w[2..2])));
END;
--VALID FILE