?? up3_clock.map.eqn
字號:
-- Copyright (C) 1991-2006 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--A1L282Q is LCD_RS~reg0
--operation mode is normal
A1L282Q_lut_out = A1L454 & (A1L455 # A1L282Q & !A1L387) # !A1L454 & (A1L282Q & !A1L387);
A1L282Q = DFFEAS(A1L282Q_lut_out, CLK_400HZ, reset, , , , , , );
--A1L280Q is LCD_E~reg0
--operation mode is normal
A1L280Q_lut_out = state.display_set & (A1L280Q) # !state.display_set & (state.hold & (A1L280Q) # !state.hold & state.toggle_e);
A1L280Q = DFFEAS(A1L280Q_lut_out, CLK_400HZ, reset, , , , , , );
--BCD_SECD0[0] is BCD_SECD0[0]
--operation mode is normal
BCD_SECD0[0]_lut_out = !BCD_SECD0[0] & (!BCD_SECD0[1] & !BCD_SECD0[2] # !BCD_SECD0[3]);
BCD_SECD0[0] = DFFEAS(BCD_SECD0[0]_lut_out, CLK_10HZ, reset, , A1L181, , , , );
--BCD_SECD0[2] is BCD_SECD0[2]
--operation mode is normal
BCD_SECD0[2]_lut_out = !BCD_SECD0[3] & (BCD_SECD0[2] $ (BCD_SECD0[0] & BCD_SECD0[1]));
BCD_SECD0[2] = DFFEAS(BCD_SECD0[2]_lut_out, CLK_10HZ, reset, , A1L181, , , , );
--BCD_S0[2] is BCD_S0[2]
--operation mode is normal
BCD_S0[2]_lut_out = !BCD_S0[3] & (BCD_S0[2] $ (BCD_S0[1] & BCD_S0[0]));
BCD_S0[2] = DFFEAS(BCD_S0[2]_lut_out, CLK_10HZ, reset, , A1L176, , , , );
--BCD_S0[0] is BCD_S0[0]
--operation mode is normal
BCD_S0[0]_lut_out = !BCD_S0[0] & (!BCD_S0[1] & !BCD_S0[2] # !BCD_S0[3]);
BCD_S0[0] = DFFEAS(BCD_S0[0]_lut_out, CLK_10HZ, reset, , A1L176, , , , );
--A1L361 is process3~354
--operation mode is normal
A1L361 = BCD_SECD0[0] & BCD_S0[0] & (BCD_SECD0[2] $ !BCD_S0[2]) # !BCD_SECD0[0] & !BCD_S0[0] & (BCD_SECD0[2] $ !BCD_S0[2]);
--BCD_SECD0[1] is BCD_SECD0[1]
--operation mode is normal
BCD_SECD0[1]_lut_out = !BCD_SECD0[3] & (BCD_SECD0[0] $ BCD_SECD0[1]);
BCD_SECD0[1] = DFFEAS(BCD_SECD0[1]_lut_out, CLK_10HZ, reset, , A1L181, , , , );
--BCD_S0[1] is BCD_S0[1]
--operation mode is normal
BCD_S0[1]_lut_out = !BCD_S0[3] & (BCD_S0[1] $ BCD_S0[0]);
BCD_S0[1] = DFFEAS(BCD_S0[1]_lut_out, CLK_10HZ, reset, , A1L176, , , , );
--BCD_SECD0[3] is BCD_SECD0[3]
--operation mode is normal
BCD_SECD0[3]_lut_out = BCD_SECD0[3] & !BCD_SECD0[0] & !BCD_SECD0[1] & !BCD_SECD0[2] # !BCD_SECD0[3] & BCD_SECD0[0] & BCD_SECD0[1] & BCD_SECD0[2];
BCD_SECD0[3] = DFFEAS(BCD_SECD0[3]_lut_out, CLK_10HZ, reset, , A1L181, , , , );
--BCD_S0[3] is BCD_S0[3]
--operation mode is normal
BCD_S0[3]_lut_out = BCD_S0[3] & !BCD_S0[1] & !BCD_S0[2] & !BCD_S0[0] # !BCD_S0[3] & BCD_S0[1] & BCD_S0[2] & BCD_S0[0];
BCD_S0[3] = DFFEAS(BCD_S0[3]_lut_out, CLK_10HZ, reset, , A1L176, , , , );
--A1L276 is Equal~329
--operation mode is normal
A1L276 = BCD_SECD0[3] $ BCD_S0[3];
--A1L362 is process3~355
--operation mode is normal
A1L362 = A1L361 & !A1L276 & (BCD_SECD0[1] $ !BCD_S0[1]);
--BCD_HRD0[0] is BCD_HRD0[0]
--operation mode is normal
BCD_HRD0[0]_lut_out = !BCD_HRD0[0] & (A1L360);
BCD_HRD0[0] = DFFEAS(BCD_HRD0[0]_lut_out, CLK_10HZ, reset, , A1L127, , , , );
--BCD_HRD1[2] is BCD_HRD1[2]
--operation mode is normal
BCD_HRD1[2]_lut_out = BCD_HRD1[2] $ A1L135;
BCD_HRD1[2] = DFFEAS(BCD_HRD1[2]_lut_out, CLK_10HZ, reset, , , , , , );
--BCD_H1[2] is BCD_H1[2]
--operation mode is normal
BCD_H1[2]_lut_out = BCD_H1[2] $ (BCD_H1[0] & BCD_H1[1] & A1L124);
BCD_H1[2] = DFFEAS(BCD_H1[2]_lut_out, CLK_10HZ, reset, , , , , , );
--BCD_H0[0] is BCD_H0[0]
--operation mode is normal
BCD_H0[0]_lut_out = !BCD_H0[0] & !A1L384 & (A1L386);
BCD_H0[0] = DFFEAS(BCD_H0[0]_lut_out, CLK_10HZ, reset, , A1L117, , , , );
--A1L363 is process3~356
--operation mode is normal
A1L363 = BCD_HRD0[0] & BCD_H0[0] & (BCD_HRD1[2] $ !BCD_H1[2]) # !BCD_HRD0[0] & !BCD_H0[0] & (BCD_HRD1[2] $ !BCD_H1[2]);
--BCD_MIND1[1] is BCD_MIND1[1]
--operation mode is normal
BCD_MIND1[1]_lut_out = !BCD_MIND1[2] & (BCD_MIND1[1] $ BCD_MIND1[0]);
BCD_MIND1[1] = DFFEAS(BCD_MIND1[1]_lut_out, CLK_10HZ, reset, , A1L165, , , , );
--BCD_MIND1[2] is BCD_MIND1[2]
--operation mode is normal
BCD_MIND1[2]_lut_out = BCD_MIND1[1] & BCD_MIND1[0] & !BCD_MIND1[2] # !BCD_MIND1[1] & !BCD_MIND1[0] & BCD_MIND1[2];
BCD_MIND1[2] = DFFEAS(BCD_MIND1[2]_lut_out, CLK_10HZ, reset, , A1L165, , , , );
--BCD_M1[2] is BCD_M1[2]
--operation mode is normal
BCD_M1[2]_lut_out = BCD_M1[1] & BCD_M1[0] & !BCD_M1[2] # !BCD_M1[1] & !BCD_M1[0] & BCD_M1[2];
BCD_M1[2] = DFFEAS(BCD_M1[2]_lut_out, CLK_10HZ, reset, , A1L153, , , , );
--BCD_M1[1] is BCD_M1[1]
--operation mode is normal
BCD_M1[1]_lut_out = !BCD_M1[2] & (BCD_M1[1] $ BCD_M1[0]);
BCD_M1[1] = DFFEAS(BCD_M1[1]_lut_out, CLK_10HZ, reset, , A1L153, , , , );
--A1L364 is process3~357
--operation mode is normal
A1L364 = BCD_MIND1[1] & BCD_M1[1] & (BCD_MIND1[2] $ !BCD_M1[2]) # !BCD_MIND1[1] & !BCD_M1[1] & (BCD_MIND1[2] $ !BCD_M1[2]);
--BCD_HRD1[0] is BCD_HRD1[0]
--operation mode is normal
BCD_HRD1[0]_lut_out = BCD_HRD1[0] & (A1L139 # A1L141) # !BCD_HRD1[0] & !A1L139 & !A1L141 & !A1L356;
BCD_HRD1[0] = DFFEAS(BCD_HRD1[0]_lut_out, CLK_10HZ, reset, , , , , , );
--BCD_MIND1[0] is BCD_MIND1[0]
--operation mode is normal
BCD_MIND1[0]_lut_out = !BCD_MIND1[0] & (!BCD_MIND1[2] # !BCD_MIND1[1]);
BCD_MIND1[0] = DFFEAS(BCD_MIND1[0]_lut_out, CLK_10HZ, reset, , A1L165, , , , );
--BCD_M1[0] is BCD_M1[0]
--operation mode is normal
BCD_M1[0]_lut_out = !BCD_M1[0] & (!BCD_M1[2] # !BCD_M1[1]);
BCD_M1[0] = DFFEAS(BCD_M1[0]_lut_out, CLK_10HZ, reset, , A1L153, , , , );
--BCD_H1[0] is BCD_H1[0]
--operation mode is normal
BCD_H1[0]_lut_out = A1L117 & !A1L384 & (BCD_H1[0] $ !A1L386) # !A1L117 & BCD_H1[0];
BCD_H1[0] = DFFEAS(BCD_H1[0]_lut_out, CLK_10HZ, reset, , , , , , );
--A1L365 is process3~358
--operation mode is normal
A1L365 = BCD_HRD1[0] & BCD_H1[0] & (BCD_MIND1[0] $ !BCD_M1[0]) # !BCD_HRD1[0] & !BCD_H1[0] & (BCD_MIND1[0] $ !BCD_M1[0]);
--BCD_HRD1[3] is BCD_HRD1[3]
--operation mode is normal
BCD_HRD1[3]_lut_out = BCD_HRD1[3] $ (BCD_HRD1[2] & A1L135);
BCD_HRD1[3] = DFFEAS(BCD_HRD1[3]_lut_out, CLK_10HZ, reset, , , , , , );
--BCD_MIND0[3] is BCD_MIND0[3]
--operation mode is normal
BCD_MIND0[3]_lut_out = BCD_MIND0[3] & !BCD_MIND0[2] & !BCD_MIND0[0] & !BCD_MIND0[1] # !BCD_MIND0[3] & BCD_MIND0[2] & BCD_MIND0[0] & BCD_MIND0[1];
BCD_MIND0[3] = DFFEAS(BCD_MIND0[3]_lut_out, CLK_10HZ, reset, , A1L164, , , , );
--BCD_M0[3] is BCD_M0[3]
--operation mode is normal
BCD_M0[3]_lut_out = BCD_M0[3] & !BCD_M0[2] & !BCD_M0[0] & !BCD_M0[1] # !BCD_M0[3] & BCD_M0[2] & BCD_M0[0] & BCD_M0[1];
BCD_M0[3] = DFFEAS(BCD_M0[3]_lut_out, CLK_10HZ, reset, , A1L148, , , , );
--BCD_H1[3] is BCD_H1[3]
--operation mode is normal
BCD_H1[3]_lut_out = BCD_H1[3] $ (BCD_H1[2] & A1L124 & A1L122);
BCD_H1[3] = DFFEAS(BCD_H1[3]_lut_out, CLK_10HZ, reset, , , , , , );
--A1L366 is process3~359
--operation mode is normal
A1L366 = BCD_HRD1[3] & BCD_H1[3] & (BCD_MIND0[3] $ !BCD_M0[3]) # !BCD_HRD1[3] & !BCD_H1[3] & (BCD_MIND0[3] $ !BCD_M0[3]);
--BCD_MIND0[2] is BCD_MIND0[2]
--operation mode is normal
BCD_MIND0[2]_lut_out = !BCD_MIND0[3] & (BCD_MIND0[2] $ (BCD_MIND0[0] & BCD_MIND0[1]));
BCD_MIND0[2] = DFFEAS(BCD_MIND0[2]_lut_out, CLK_10HZ, reset, , A1L164, , , , );
--BCD_S1[1] is BCD_S1[1]
--operation mode is normal
BCD_S1[1]_lut_out = !BCD_S1[2] & (BCD_S1[1] $ BCD_S1[0]);
BCD_S1[1] = DFFEAS(BCD_S1[1]_lut_out, CLK_10HZ, reset, , A1L175, , , , );
--BCD_SECD1[1] is BCD_SECD1[1]
--operation mode is normal
BCD_SECD1[1]_lut_out = !BCD_SECD1[2] & (BCD_SECD1[1] $ BCD_SECD1[0]);
BCD_SECD1[1] = DFFEAS(BCD_SECD1[1]_lut_out, CLK_10HZ, reset, , A1L191, , , , );
--BCD_M0[2] is BCD_M0[2]
--operation mode is normal
BCD_M0[2]_lut_out = !BCD_M0[3] & (BCD_M0[2] $ (BCD_M0[0] & BCD_M0[1]));
BCD_M0[2] = DFFEAS(BCD_M0[2]_lut_out, CLK_10HZ, reset, , A1L148, , , , );
--A1L367 is process3~360
--operation mode is normal
A1L367 = BCD_MIND0[2] & BCD_M0[2] & (BCD_S1[1] $ !BCD_SECD1[1]) # !BCD_MIND0[2] & !BCD_M0[2] & (BCD_S1[1] $ !BCD_SECD1[1]);
--BCD_HRD0[2] is BCD_HRD0[2]
--operation mode is normal
BCD_HRD0[2]_lut_out = A1L360 & (BCD_HRD0[2] $ (BCD_HRD0[0] & BCD_HRD0[1]));
BCD_HRD0[2] = DFFEAS(BCD_HRD0[2]_lut_out, CLK_10HZ, reset, , A1L127, , , , );
--BCD_MIND0[0] is BCD_MIND0[0]
--operation mode is normal
BCD_MIND0[0]_lut_out = !BCD_MIND0[0] & (!BCD_MIND0[2] & !BCD_MIND0[1] # !BCD_MIND0[3]);
BCD_MIND0[0] = DFFEAS(BCD_MIND0[0]_lut_out, CLK_10HZ, reset, , A1L164, , , , );
--BCD_M0[0] is BCD_M0[0]
--operation mode is normal
BCD_M0[0]_lut_out = !BCD_M0[0] & (!BCD_M0[2] & !BCD_M0[1] # !BCD_M0[3]);
BCD_M0[0] = DFFEAS(BCD_M0[0]_lut_out, CLK_10HZ, reset, , A1L148, , , , );
--BCD_H0[2] is BCD_H0[2]
--operation mode is normal
BCD_H0[2]_lut_out = A1L386 & !A1L384 & (BCD_H0[2] $ A1L2);
BCD_H0[2] = DFFEAS(BCD_H0[2]_lut_out, CLK_10HZ, reset, , A1L117, , , , );
--A1L368 is process3~361
--operation mode is normal
A1L368 = BCD_HRD0[2] & BCD_H0[2] & (BCD_MIND0[0] $ !BCD_M0[0]) # !BCD_HRD0[2] & !BCD_H0[2] & (BCD_MIND0[0] $ !BCD_M0[0]);
--A1L369 is process3~362
--operation mode is normal
A1L369 = A1L365 & A1L366 & A1L367 & A1L368;
--BCD_S1[0] is BCD_S1[0]
--operation mode is normal
BCD_S1[0]_lut_out = !BCD_S1[0] & (!BCD_S1[2] # !BCD_S1[1]);
BCD_S1[0] = DFFEAS(BCD_S1[0]_lut_out, CLK_10HZ, reset, , A1L175, , , , );
--BCD_MIND0[1] is BCD_MIND0[1]
--operation mode is normal
BCD_MIND0[1]_lut_out = !BCD_MIND0[3] & (BCD_MIND0[0] $ BCD_MIND0[1]);
BCD_MIND0[1] = DFFEAS(BCD_MIND0[1]_lut_out, CLK_10HZ, reset, , A1L164, , , , );
--BCD_M0[1] is BCD_M0[1]
--operation mode is normal
BCD_M0[1]_lut_out = !BCD_M0[3] & (BCD_M0[0] $ BCD_M0[1]);
BCD_M0[1] = DFFEAS(BCD_M0[1]_lut_out, CLK_10HZ, reset, , A1L148, , , , );
--BCD_SECD1[0] is BCD_SECD1[0]
--operation mode is normal
BCD_SECD1[0]_lut_out = !BCD_SECD1[0] & (!BCD_SECD1[2] # !BCD_SECD1[1]);
BCD_SECD1[0] = DFFEAS(BCD_SECD1[0]_lut_out, CLK_10HZ, reset, , A1L191, , , , );
--A1L370 is process3~363
--operation mode is normal
A1L370 = BCD_S1[0] & BCD_SECD1[0] & (BCD_MIND0[1] $ !BCD_M0[1]) # !BCD_S1[0] & !BCD_SECD1[0] & (BCD_MIND0[1] $ !BCD_M0[1]);
--BCD_S1[2] is BCD_S1[2]
--operation mode is normal
BCD_S1[2]_lut_out = BCD_S1[1] & BCD_S1[0] & !BCD_S1[2] # !BCD_S1[1] & !BCD_S1[0] & BCD_S1[2];
BCD_S1[2] = DFFEAS(BCD_S1[2]_lut_out, CLK_10HZ, reset, , A1L175, , , , );
--BCD_HRD0[3] is BCD_HRD0[3]
--operation mode is normal
BCD_HRD0[3]_lut_out = A1L360 & (BCD_HRD0[3] $ (BCD_HRD0[2] & A1L1));
BCD_HRD0[3] = DFFEAS(BCD_HRD0[3]_lut_out, CLK_10HZ, reset, , A1L127, , , , );
--BCD_H0[3] is BCD_H0[3]
--operation mode is normal
BCD_H0[3]_lut_out = A1L386 & A1L3 & (!A1L384);
BCD_H0[3] = DFFEAS(BCD_H0[3]_lut_out, CLK_10HZ, reset, , A1L117, , , , );
--BCD_SECD1[2] is BCD_SECD1[2]
--operation mode is normal
BCD_SECD1[2]_lut_out = BCD_SECD1[1] & BCD_SECD1[0] & !BCD_SECD1[2] # !BCD_SECD1[1] & !BCD_SECD1[0] & BCD_SECD1[2];
BCD_SECD1[2] = DFFEAS(BCD_SECD1[2]_lut_out, CLK_10HZ, reset, , A1L191, , , , );
--A1L371 is process3~364
--operation mode is normal
A1L371 = BCD_S1[2] & BCD_SECD1[2] & (BCD_HRD0[3] $ !BCD_H0[3]) # !BCD_S1[2] & !BCD_SECD1[2] & (BCD_HRD0[3] $ !BCD_H0[3]);
--BCD_HRD1[1] is BCD_HRD1[1]
--operation mode is normal
BCD_HRD1[1]_lut_out = A1L142 & BCD_HRD1[1] # !A1L142 & !A1L356 & (BCD_HRD1[1] $ BCD_HRD1[0]);
BCD_HRD1[1] = DFFEAS(BCD_HRD1[1]_lut_out, CLK_10HZ, reset, , , , , , );
--BCD_HRD0[1] is BCD_HRD0[1]
--operation mode is normal
BCD_HRD0[1]_lut_out = A1L360 & (BCD_HRD0[0] $ BCD_HRD0[1]);
BCD_HRD0[1] = DFFEAS(BCD_HRD0[1]_lut_out, CLK_10HZ, reset, , A1L127, , , , );
--BCD_H0[1] is BCD_H0[1]
--operation mode is normal
BCD_H0[1]_lut_out = A1L386 & !A1L384 & (BCD_H0[0] $ BCD_H0[1]);
BCD_H0[1] = DFFEAS(BCD_H0[1]_lut_out, CLK_10HZ, reset, , A1L117, , , , );
--BCD_H1[1] is BCD_H1[1]
--operation mode is normal
BCD_H1[1]_lut_out = A1L124 & !A1L384 & (BCD_H1[1] $ BCD_H1[0]) # !A1L124 & BCD_H1[1];
BCD_H1[1] = DFFEAS(BCD_H1[1]_lut_out, CLK_10HZ, reset, , , , , , );
--A1L372 is process3~365
--operation mode is normal
A1L372 = BCD_HRD1[1] & BCD_H1[1] & (BCD_HRD0[1] $ !BCD_H0[1]) # !BCD_HRD1[1] & !BCD_H1[1] & (BCD_HRD0[1] $ !BCD_H0[1]);
--A1L373 is process3~366
--operation mode is normal
A1L373 = A1L372 & CLOSE_ALARM & (!SET_ALARM);
--A1L374 is process3~367
--operation mode is normal
A1L374 = A1L369 & A1L370 & A1L371 & A1L373;
--A1L375 is process3~368
--operation mode is normal
A1L375 = A1L362 & A1L363 & A1L364 & A1L374;
--A1L284 is LessThan~2092
--operation mode is normal
A1L284 = A1L6 # A1L9 # A1L12 # A1L15;
--A1L285 is LessThan~2093
--operation mode is normal
A1L285 = A1L18 # A1L21 # A1L24 # A1L27;
--A1L286 is LessThan~2094
--operation mode is normal
A1L286 = A1L30 # A1L33 # A1L36 # A1L39;
--A1L287 is LessThan~2095
--operation mode is normal
A1L287 = A1L42 # A1L45 # A1L48 # A1L51;
--A1L288 is LessThan~2096
--operation mode is normal
A1L288 = A1L284 # A1L285 # A1L286 # A1L287;
--A1L289 is LessThan~2097
--operation mode is normal
A1L289 = A1L54 # A1L57 # A1L60 # A1L63;
--A1L290 is LessThan~2098
--operation mode is normal
A1L290 = A1L66 # A1L69 # A1L72 # A1L75;
--A1L291 is LessThan~2099
--operation mode is normal
A1L291 = A1L78 # A1L81 # A1L84 # A1L87;
--A1L292 is LessThan~2100
--operation mode is normal
A1L292 = A1L90 # A1L93 # A1L96;
--A1L293 is LessThan~2101
--operation mode is normal
A1L293 = A1L289 # A1L290 # A1L291 # A1L292;
--A1L376 is process3~369
--operation mode is normal
A1L376 = !SET_ALARM & !A1L98 & (A1L288 # A1L293);
--A1L377 is process3~370
--operation mode is normal
?? 快捷鍵說明
復制代碼
Ctrl + C
搜索代碼
Ctrl + F
全屏模式
F11
切換主題
Ctrl + Shift + D
顯示快捷鍵
?
增大字號
Ctrl + =
減小字號
Ctrl + -