/*	*************************************************		*/
/*	*						*		*/
/*	*	AMX 4-Thumb Multitasking Kernel		*		*/
/*	*	ARM Timer Reference Clock Driver	*		*/
/*	*						*		*/
/*	*************************************************		*/
/*									*/
/*	Copyright (c) 1997						*/
/*	KADAK Products Ltd.						*/
/*	Vancouver, B.C., Canada						*/
/*									*/
/*	All rights reserved.						*/
/*									*/
/*  This document and source file contains CONFIDENTIAL INFORMATION	*/
/*  or trade secrets, or both, which are the property of KADAK		*/
/*  Products Ltd. This document and source file is subject to the	*/
/*  terms and conditions of the KADAK Products Ltd. Software License	*/
/*  Agreement which restricts the manner in which it may be used.	*/
/*									*/
/*	Release Date:	November 1, 1997				*/

#include	"cjzzz.h"		/* General Kernel definitions	*/

/*	*************************************************		*/
/*	*						*		*/
/*	*	ARM Timer Reference Peripheral		*		*/
/*	*		Clock Driver			*		*/
/*	*						*		*/
/*	*************************************************		*/

/* ARM document "ARM DDI 0062D" (Reference Peripherals Specification)	*/
/* defines a dual counter/timer specification as used on the		*/
/* ARM Development Board for the ARM7TDMI.				*/
/* Each timer is a 16-bit wide down counter with a selectable		*/
/* input clock pre-scale division of 1, 16 or 256.			*/
/* This clock driver module supports the use of either one of the	*/
/* two counter timers identified in the stated specification.		*/
/*									*/
/* Edit the following definitions to identify the manner in which	*/
/* the ARM Timer Reference Peripheral is configured in your		*/
/* hardware system.							*/
/* Define VVPIT to be the base address of the memory mapped timer	*/
/* register block reserved for addressing the chip.			*/
/* Define VVINTV to be the AMX vector number reserved for the interrupt	*/
/* generated by the selected timer.					*/
/* Define VVTIMER to be 1 or 2 to pick timer 1 or 2.			*/
/* To define the clock frequency, you MUST				*/
/* define VVPRESCALE to be 1, 16 or 256 to pick the input clock		*/
/* pre-scale and define VVCOUNT to be 1 to 63535 to pick the		*/
/* downcount value.							*/
/* A delay may be required between consecutive device accesses.		*/
/* Define VVIODELAY to be the number of microseconds to delay between	*/
/* reads or writes to memory mapped I/O device registers.		*/
/*									*/
/* The following example selects Timer 1 of the ARM Timer Reference	*/
/* Peripheral as implemented in the custom FPGA chip on the		*/
/* ARM Development Board for the ARM7TDMI.				*/
/* With an input clock frequency of 20MHz, a pre-scale divisor		*/
/* of 1 and a downcount value of 20000 generates a 1ms clock interrupt.	*/
/* Delay 1 microsecond between I/O reads and writes.			*/

#define VVPIT	0x0A800000		/* Timer base address		*/
#define VVINTV	4			/* PIT vector number		*/
#define VVTIMER	1			/* Select timer			*/
#define VVPRESCALE 1			/* Pre-scale divisor value	*/
#define VVCOUNT 20000			/* Downcount value		*/
#define VVIODELAY 1			/* I/O delay (microseconds)	*/


/* The following macros are used for device input/output operations.	*/
/* Revise these macros, if necessary, to account for the manner in	*/
/* which devices are addressed in your hardware configuration.		*/

#define IN32(port) \
	((VVIODELAY ? (cjcfhwdelay(VVIODELAY), 0) : 0), \
	(unsigned char)cjcfin32((void *)(port)))
#define OUT32(port, val) \
	((VVIODELAY ? (cjcfhwdelay(VVIODELAY), 0) : 0), \
	cjcfout32((void *)(port), (CJ_T32)(val)))

/* ---------------------------------------------------------------------*/
/* Define timer registers and masks					*/

#define CTLOAD	0x00		/* Timer reload value (read/write)	*/
#define CTVALUE	0x04		/* Timer current value (read)		*/
#define CTCTRL	0x08		/* Timer control (read/write)		*/
#define CTCLEAR	0x0C		/* Timer clear interrupt (write)	*/
#define CTOFS2	0x20		/* Timer 2 offset from base address	*/

				/* Counter/timer control bit masks	*/
#define CTRLDIV1	0x00000000	/* Divide by 1 prescale		*/
#define CTRLDIV16	0x00000004	/* Divide by 16 prescale	*/
#define CTRLDIV256	0x00000008	/* Divide by 256 prescale	*/
#define CTRLMPERIOD	0x00000040	/* Periodic timer mode		*/
#define CTRLENABLE	0x00000080	/* Timer enable			*/


/* Define registers and masks for the particular timer selected		*/

#if (VVTIMER==1)
#define VVTMR (VVPIT)			/* Timer 1 port			*/
#endif
#if (VVTIMER==2)
#define VVTMR ((VVPIT)+CTOFS2)		/* Timer 2 port			*/
#endif

					/* Timer control value		*/
#if (VVPRESCALE==1)
#define VVCTRL (CTRLMPERIOD | CTRLDIV1)
#endif
#if (VVPRESCALE==16)
#define VVCTRL (CTRLMPERIOD | CTRLDIV16)
#endif
#if (VVPRESCALE==256)
#define VVCTRL (CTRLMPERIOD | CTRLDIV256)
#endif


/* External references							*/
					/* Board support procedure	*/
void CJ_CCPP chclken(int tmrnum);	/* Clock interrupt enable	*/
void CJ_CCPP chclkdis(int tmrnum);	/* Clock interrupt disable	*/

void CJ_CCPP ch0062clk(void);		/* Clock ISP root in		*/
					/* Target Configuration Module	*/

/* ---------------------------------------------------------------------*/
/* chclockinit - Initialize Clock Driver				*/
/*									*/
/* Add this procedure to your list of Restart Procedures at the		*/
/* point in the list at which you wish the clock to begin operation.	*/
/*									*/
/* Return:	Interrupts are disabled and are then			*/
/*		restored to their state upon entry.			*/

void CJ_CCPP chclockinit(void)
{
	CJ_TYFLAGS	procflags;	/* Saved processor flags	*/

/*--------								*/
/* Save interrupt status						*/
/* Disable interrupts							*/
/* Disable clock interrupts						*/
/* Install clock interrupt handler					*/
/* Set periodic timer mode and pre-scale divisor			*/
/* Program timer for desired frequency of operation			*/
/* Start clock and enable clock interrupts				*/
/*--------								*/
/* ---	Disable interrupts -------------				*/
	procflags = cj_kpsrrddi();
	chclkdis(VVTIMER);		/* Disable clock interrupts	*/
	cjksivtwr(VVINTV, ch0062clk);	/* Install clock ISP		*/
	OUT32(VVTMR + CTCTRL, VVCTRL);	/* Set timer mode and pre-scale	*/
	OUT32(VVTMR + CTLOAD, VVCOUNT);	/* Set timer downcount value	*/
					/* Enable the timer		*/
	OUT32(VVTMR + CTCTRL, VVCTRL | CTRLENABLE);

	chclken(VVTIMER);		/* Enable clock interrupts	*/
/* ---	Restore interrupts -------------				*/
	cjcfflagwr(procflags);
	}

/* ---------------------------------------------------------------------*/
/* chclockexit - Clock Driver Exit Procedure				*/
/*									*/
/* Add this procedure to your list of Exit Procedures at the		*/
/* point in the list at which you wish to shut off clock operation.	*/
/*									*/
/* Return:	Interrupts are disabled and are then			*/
/*		restored to their state upon entry.			*/

void CJ_CCPP chclockexit(void)
{
	CJ_TYFLAGS	procflags;	/* Saved processor flags	*/

/*--------								*/
/* Save interrupt status						*/
/* Disable interrupts							*/
/* Disable clock interrupts and reset the clock				*/
/*--------								*/
/* ---	Disable interrupts -------------				*/
	procflags = cj_kpsrrddi();
	chclkdis(VVTIMER);		/* Disable timer interrupts	*/
	OUT32(VVTMR + CTCTRL, VVCTRL);	/* Disable the timer		*/
/* ---	Restore interrupts -------------				*/
	cjcfflagwr(procflags);
	}

/* End of File */