[Device]
Family=lc4k;
PartNumber=LA4128V-75TN100E;
Package=100TQFP;
PartType=LA4128V;
Speed=-7.5;
Operating_condition=AUTO;
Status=Production;

[Revision]
Parent=lc4k128v.lci;
DATE=06/18/2007;
TIME=08:47:02;
Source_Format=Schematic_VHDL;
Synthesis=Synplify;

[Ignore Assignments]

[Clear Assignments]

[Backannotate Assignments]

[Global Constraints]

[Location Assignments]
Layer = Off;

[Group Assignments]
Layer = Off;

[Resource Reservations]
Layer = Off;

[Fitter Report Format]

[Power]

[Source Constraint Option]

[Fast Bypass]

[OSM Bypass]

[Input Registers]

[Netlist/Delay Format]

[IO Types]
Layer = off;

[Pullup]

[Slewrate]

[Region]

[Timing Constraints]

[HSI Attributes]

[Input Delay]