?? xiaodou.vhd
字號:
LIBRARY IEEE; --定義消抖電路
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY xiaodou IS
PORT(shuru,CP:IN STD_LOGIC; shuchu:OUT STD_LOGIC);--B為時鐘信號
END xiaodou;
ARCHITECTURE xiaodou_arc OF xiaodou IS
COMPONENT D_FF IS
PORT(A,B:IN STD_LOGIC; C,D:OUT STD_LOGIC);
END COMPONENT;
SIGNAL T1,T2,T3,T4,T5,T6:STD_LOGIC;
signal q1,q2,temp,timetick:std_logic;
signal counter:integer range 0 to 5000;
BEGIN
fenpin:process(cp)
begin
if cp'event and cp='1' then
if counter=5000 then
counter<=0;timetick<=not timetick;
else counter<=counter+1;
end if;
end if;
end process fenpin;
T2<=NOT (shuru AND T1);
T1<=NOT (T2 AND T3);
U2:D_FF PORT MAP(T2,timetick,T4,T3);--CP為時鐘信號,T4為Q1
U3:D_FF PORT MAP(T4,timetick,T6,T5);--T6為Q2,T5為Q2非
temp<=T4 AND T5;
weifen:process(timetick)
begin
if timetick'event and timetick='1' then
q1<=temp;
q2<=q1;
end if;
shuchu<=q1 and not q2;
end process weifen;
END xiaodou_arc;
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