//////////////////////////////////////////////////////////////////////////////
//
//
//
//
//
//
//////////////////////////////////////////////////////////////////////////////

#include <Cdef21262.h>
#include <def21262.h>
#include <sru.h>
#include <signal.h>
#include <math.h>
#include <stdlib.h>
#include <filter.h>

#include "post_common.h"


volatile bool g_bLeftRight = 1;
volatile int  g_iSampleIndex = 1;
volatile int  g_iSampleCount = 0;


volatile float g_fSineWaveOut[MAX_SAMPLES];
volatile float g_fSineWaveIn_Left[MAX_SAMPLES];
volatile float g_fSineWaveIn_Right[MAX_SAMPLES];


void Delay(const int iVal)
{
	int nDelay;
	for( nDelay = 0; nDelay < iVal; nDelay++)
	{
		asm("nop;");
	}
}


void Config_SRU_DAI(void)
{

//-----------------------------------------------------------------------------
//
//  MCLK: The output of the 12.288 MHz xtal is either directly connected to the
//          codec, but also connected to DAI_P06, or just to DAI_P17. This is
//             determined by switches 7.1 and 7.2 For this example we route the
//             MCLK into DAI_P17 and supply the clock to the ADC via DAI_P06
//             by routing the signal through the SRU.

    SRU(LOW,DAI_PB17_I);	//  Tie the pin buffer input LOW.
    SRU(LOW,PBEN17_I);		//  Tie the pin buffer enable input LOW


//-----------------------------------------------------------------------------
//
//  Connect the ADC: The codec drives a BCLK output to DAI pin 7, a LRCLK
//          (a.k.a. frame sync) to DAI pin 8 and data to DAI pin 5.
//
//          Connect the ADC to SPORT0, using data input A
//
//          All three lines are always inputs to the SHARC so tie the pin
//          buffer inputs and pin buffer enable inputs all low.


//------------------------------------------------------------------------
//  Connect the ADC to SPORT0, using data input A

    //  Clock in on pin 7
    SRU(DAI_PB07_O,SPORT0_CLK_I);

    //  Frame sync in on pin 8
    SRU(DAI_PB08_O,SPORT0_FS_I);

    //  Data in on pin 5
    SRU(DAI_PB05_O,SPORT0_DA_I);

//------------------------------------------------------------------------
//  Tie the pin buffer inputs LOW for DAI pins 5, 6 7 and 8.  Even though
//    these pins are inputs to the SHARC, tying unused pin buffer inputs
//    LOW is "good coding style" to eliminate the possibility of
//    termination artifacts internal to the IC.  Note that signal
//    integrity is degraded only with a few specific SRU combinations.
//    In practice, this occurs VERY rarely, and these connections are
//    typically unnecessary.


    SRU(LOW,DAI_PB05_I);
    SRU(LOW,DAI_PB07_I);
    SRU(LOW,DAI_PB08_I);

//------------------------------------------------------------------------
//  Tie the pin buffer enable inputs LOW for DAI pins 5, 6, 7 and 8 so
//    that they are always input pins.

    SRU(LOW,PBEN05_I);
    SRU(LOW,PBEN07_I);
    SRU(LOW,PBEN08_I);

//-----------------------------------------------------------------------------
//
//  Connect the DACs: The codec accepts a BCLK input from DAI pin 13 and
//          a LRCLK (a.k.a. frame sync) from DAI pin 14 and has four
//          serial data outputs to DAI pins 12, 11, 10 and 9
//
//          Connect DAC1 to SPORT1, using data output A
//          Connect DAC2 to SPORT1, using data output B
//          Connect DAC3 to SPORT2, using data output A
//          Connect DAC4 to SPORT2, using data output B
//
//          Connect the clock and frame sync inputs to SPORT1 and SPORT2
//          should come from the ADC on DAI pins 7 and 8, respectively
//
//          Connect the ADC BCLK and LRCLK back out to the DAC on DAI
//          pins 13 and 14, respectively.
//
//          All six DAC connections are always outputs from the SHARC
//          so tie the pin buffer enable inputs all high.
//

//------------------------------------------------------------------------
//  Connect the pin buffers to the SPORT data lines and ADC BCLK & LRCLK

    SRU(SPORT2_DB_O,DAI_PB09_I);
    SRU(SPORT2_DA_O,DAI_PB10_I);
    SRU(SPORT1_DB_O,DAI_PB11_I);
    SRU(SPORT1_DA_O,DAI_PB12_I);

//------------------------------------------------------------------------
//  Connect the clock and frame sync input from the ADC directly
//    to the output pins driving the DACs.

    SRU(DAI_PB07_O,DAI_PB13_I);
    SRU(DAI_PB08_O,DAI_PB14_I);
    SRU(DAI_PB17_O,DAI_PB06_I); // comment out for external pll

//------------------------------------------------------------------------
//  Connect the SPORT clocks and frame syncs to the clock and
//    frame sync from the SPDIF receiver

    SRU(DAI_PB07_O,SPORT1_CLK_I);
    SRU(DAI_PB07_O,SPORT2_CLK_I);
    SRU(DAI_PB08_O,SPORT1_FS_I);
    SRU(DAI_PB08_O,SPORT2_FS_I);

//------------------------------------------------------------------------
//  Tie the pin buffer enable inputs HIGH to make DAI pins 9-14 outputs.
    SRU(HIGH,PBEN06_I);
    SRU(HIGH,PBEN09_I);
    SRU(HIGH,PBEN10_I);
    SRU(HIGH,PBEN11_I);
    SRU(HIGH,PBEN12_I);
    SRU(HIGH,PBEN13_I);
    SRU(HIGH,PBEN14_I);
}


void Config_SRU_INTS(void)
{
	//Pin Assignments in SRU_PIN3 (Group D)
    SRU(LOW,DAI_PB19_I);//assign pin buffer 19 low so it is an input
    SRU(LOW,DAI_PB20_I);    //assign pin buffer 20 low so it is an input

    //Route MISCA singnals in SRU_EXT_MISCA (Group E)
    SRU(DAI_PB19_O,MISCA1_I);//route so that DAI pin buffer 19 connects to MISCA1
    SRU(DAI_PB20_O,MISCA2_I);//route so that DAI pin buffer 20 connects to MISCA2

    //Pin Buffer Disable in SRU_PINEN0 (Group F)
    SRU(LOW,PBEN19_I);//assign pin 19 low so it is an input
    SRU(LOW,PBEN20_I);//assign pin 20 low so it is an input
}



void Config_SRU_LEDS(void)
{

    //assign pin buffer 19 low so it is an input
    SRU(LOW,DAI_PB19_I);

    //assign pin buffer 20 low so it is an input
    SRU(LOW,DAI_PB20_I);

//Route MISCB singnals in SRU_EXT_MISCB (Group E)

    //route so that DAI pin buffer 19 connects to MISCB1
    SRU(DAI_PB19_O,MISCB1_I);

    //route so that DAI pin buffer 20 connects to MISCB2
    SRU(DAI_PB20_O,MISCB2_I);

//Pin Buffer Disable in SRU_PINEN0 (Group F)

    //assign pin 19 low so it is an input
    SRU(LOW,PBEN19_I);

    //assign pin 20 low so it is an input
    SRU(LOW,PBEN20_I);
	
}



int Test_Channel(float* pfRealIn, const int iMaxSamples, const int iSampleRate, const float fExpFreq, const float fFreqTol, const float fSigStrnt, const float fAmpTol)
{
    complex_float cfFFTOut[(MAX_SAMPLES/2)];

	float fTempFreq = 0, fTemp2Freq = 0;
	int nSampleNumber = 0;
	int nHighestFreqIndex = 0, nSecHighestFreqIndex =0;
	float fSampledFrequency = 0;
	float fSlope = 0.0;
	int   iSlopeY1 = 0;
	const float fMaxFreq = (fExpFreq + (fExpFreq * fFreqTol));
	const float fMinFreq = (fExpFreq - (fExpFreq * fFreqTol));
	const float fMaxAmp  = (fSigStrnt + (fSigStrnt * fAmpTol));
	const float fMinAmp  = (fSigStrnt - (fSigStrnt * fAmpTol));
	
	// Real input array fills from a converter or other source
	rfft256( pfRealIn, (complex_float*)cfFFTOut);
	
	// Arrays are filled with FFT data
   	// scan the output array for the highest real value
   	fTempFreq = abs(cfFFTOut[0].re);
   	
 	for (nSampleNumber=1; nSampleNumber < (iMaxSamples / 2); nSampleNumber++)
    {
		if( abs(cfFFTOut[nSampleNumber].re) > fTempFreq )
		{
			fTempFreq = abs(cfFFTOut[nSampleNumber].re);
			nHighestFreqIndex = nSampleNumber;
		}
    }
    
   // multiply the index of the array of the highest value with the sample rate value
   fSampledFrequency = nHighestFreqIndex * (iSampleRate / iMaxSamples);


   // make sure frequency is within acceptable ranges
   if( (fSampledFrequency < fMaxFreq) && (fSampledFrequency > fMinFreq) )
   {
   		// for now, take the point before, and after the max value
   		// average them, then find the distance between them

		// the slope is given by b = (y2 - y1) / (x2 - x1) or b = y2-y1
	    if( 0 == nSampleNumber )
	    {	// roll around to the end of the array
	    	iSlopeY1 = iMaxSamples;
	    }
	    else if( iMaxSamples == nSampleNumber )
	    {
	    	iSlopeY1 = 0;
	    }
	    else
	    {
	    	iSlopeY1 = nSampleNumber - 1;
	    }

	    fSlope = (cfFFTOut[nHighestFreqIndex].re - cfFFTOut[iSlopeY1].re);

	    fSlope = abs(fSlope);

        //Make sure amplitude is within acceptable range [TAR-32652]              	
        if( (fSlope > fMaxAmp ) || (fSlope < fMinAmp))
	    {
	    	return 0;
	    }
		
   		return 1;
   }

	return 0;	// test failed
}

void CreateSinTable(const float fAmp, const float fFreq, const float fSampleRate)
{
	int n;

	for(n = 0; n < MAX_SAMPLES; n++)
	{
		g_fSineWaveOut[n] = (float)(fAmp * sin( (2.0 * PI * fFreq * ( ((float)(n+1)) / fSampleRate))) );
	}
}