?? sport dma chaining.c
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// **********************************************************************************
// * ADSP-2126x SPORT Internal Loopback Example - DMA Chained Example *
// * *
// * This example loops back data from tx_buf to rx_buf via SPORT0 to SPORT1 *
// * *
// * *
// * Author: Brian M. *
// * Analog Devices, Inc. *
// * Rev 1.0 *
// * 7/03 *
// **********************************************************************************
#include <signal.h>
#define bufsize 10
// Interrupt Control Bits
#define IRPTEN 0x00001000
#define SP1I 0x00004000
#define SP0IMSK 0x00000400
#define SP0I 0x00000001
// SPORT DMA Parameter Registers
#define CPSP0A 0xC43
#define CPSP1A 0xC4B
// SPORT Control Registers
#define DIV0 0xC02
#define DIV1 0xC03
#define SPCTL0 0xC00
#define SPCTL1 0xC01
#define SPMCTL01 0xC04
// SPORT Control Bits
#define SPL 0x00001000
#define SPEN_A 0x00000001
#define SDEN_A 0x00040000
#define SCHEN_A 0x00080000
#define SLEN32 0x000001F0
#define SPTRAN 0x02000000
#define IFS 0x00004000
#define FSR 0x00002000
#define ICLK 0x00000400
//Transmit Buffers
int tx_buf1a[bufsize]= {0x11111111,
0x22222222,
0x33333333,
0x44444444,
0x55555555,
0x66666666,
0x77777777,
0x88888888,
0x99999999,
0xAAAAAAAA};
int tx_buf1b[bufsize]= {0x12345678,
0x23456789,
0x3456789A,
0x456789AB,
0x56789ABC,
0x6789ABCD,
0x789ABCDE,
0x89ABCDEF,
0x9ABCDEF0,
0xABCDEF01};
//Receive Buffers
int rx_buf0a[bufsize];
int rx_buf0b[bufsize];
//Transmit TCB's
int tx_tcb1[4] = {0,sizeof(tx_buf1a),1,(int) tx_buf1a};
int tx_tcb2[4] = {0,sizeof(tx_buf1b),1,(int) tx_buf1b};
int rx_tcb1[4] = {0,sizeof(rx_buf0a),1,(int) rx_buf0a};
int rx_tcb2[4] = {0,sizeof(rx_buf0b),1,(int) rx_buf0b};
/* ISR counters, for debug purposes to see how many times SPORT DMA interrupts are serviced */
int SP0I_counter = 0;
int SP1I_counter = 0;
float buoy;
void Count_SPORT0_RX_IRQs(int);
void Count_SPORT1_TX_IRQs(int);
void main()
{
interrupt(SIG_SP0,Count_SPORT0_RX_IRQs);
interrupt(SIG_SP1,Count_SPORT1_TX_IRQs);
/////////////////////////////////////////////////////////////////////////////////////////
// //
// SPORT Loopback init/test: Use SPORT0 as RX & SPORT1 as TX //
// //
/////////////////////////////////////////////////////////////////////////////////////////
* (volatile int *) SPCTL0 = 0;
* (volatile int *) SPCTL1 = 0;
* (volatile int *) SPMCTL01 = 0;
SPORT_DMA_setup:
/* set internal loopback bit for SPORT0 & SPORT1 */
* (volatile int *) SPMCTL01 |= SPL;
/* Configure SPORT1 as a transmitter */
/* CLKDIV1=[fCCLK(200 MHz)/2xFSCLK(20 MHz)]-1 = 0x0004 */
/* FSDIV1=[FSCLK(20 MHz)/TFS(.625 MHz)]-1 = 31 = 0x001F */
* (volatile int *) DIV1 = 0x001F0004; //internally generating clock and frame sync
* (volatile int *) SPCTL1 = (SPEN_A | SLEN32 | FSR | SPTRAN | SDEN_A | IFS | ICLK | SCHEN_A);
/* Configure SPORT0 as a reciever */
* (volatile int *) DIV0 = 0; /* externally generating clock and frame sync */
* (volatile int *) SPCTL0 = (SPEN_A | SLEN32 | FSR | SDEN_A |SCHEN_A);
tx_tcb2[0] = (((int)tx_tcb1+3) & 0x7FFFF);
rx_tcb2[0] = (((int)rx_tcb1+3) & 0x7FFFF);
rx_tcb1[0] = (((int)rx_tcb2+3) & 0x7FFFF);
* (volatile int *) CPSP0A = ((int) rx_tcb1+3);
tx_tcb1[0] = (((int)tx_tcb2+3) & 0x7FFFF);
* (volatile int *) CPSP1A = ((int) tx_tcb1+3);
for(;;)
{buoy++;}
}
/////////////////////////////////////////////////////////////
// //
// SPORT0 and SPORT1 Interrupt Service Routines //
// //
/////////////////////////////////////////////////////////////
void Count_SPORT0_RX_IRQs(int sig_int)
{
SP0I_counter++; /* increment count */
}
void Count_SPORT1_TX_IRQs(int sig_int)
{
SP1I_counter++; /* increment count */
}
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