ARCHITECTURE(ADSP-21369)

//   Note: The SHARC 21369 has 2Mbit RAM and 6Mbit ROM in total.

//   ADSP-21369 Memory Map:
//   ------------------------------------------------------------------------

//                    0x0000 0000 to 0x0003 FFFF  IOP Regs

//   -----------------------------------------------------------------------
//       Long word (64-bit) space.  Address range 0x0004 0000 to 0x0007 FFFF
//   -----------------------------------------------------------------------

//   Block 0   0x0004 0000 to 0x0004 BFFF  Long word (64) Space (3 Mbits ROM)
//   Block 0   0x0004 C000 to 0x0004 EFFF  Long word (64) Space (0.75 Mbit RAM)
//   Block 0   0x0004 F000 to 0x0004 FFFF  Reserved address space (0.25 Mbit)

//   Block 1   0x0005 0000 to 0x0005 BFFF  Long word (64) Space (3 Mbits ROM)
//   Block 1   0x0005 C000 to 0x0005 EFFF  Long word (64) Space (0.75 Mbit RAM)
//   Block 1   0x0005 F000 to 0x0005 FFFF  Reserved address space (0.25 Mbit)

//   Block 2   0x0006 0000 to 0x0006 0FFF  Long word (64) Space (0.25 Mbit RAM)
//   Block 2   0x0006 1000 to 0x0006 1FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 2   0x0006 2000 to 0x0006 FFFF  Internal Memory (Reserved 3.5 Mbits)

//   Block 3   0x0007 0000 to 0x0007 0FFF  Long word (64) Space (0.25 Mbit RAM)
//   Block 3   0x0007 1000 to 0x0007 1FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 3   0x0007 2000 to 0x0007 FFFF  Internal Memory (Reserved 3.5 Mbits)

//   Below you will see a memory map for the address space from 0x0008 0000 to
//   0x000F FFFF The 48 bit space section describes what this address range
//   looks like to an instruction that retrieves 48 bit memory.  The 32 bit
//   section describes what this address range looks like to an instruction that
//   retrieves 32 bit memory
//
//   ------------------------------------------------------------------------
//       48-bit space. Address range 0x0008 0000 to 0x000F FFFF
//   ------------------------------------------------------------------------

//   Block 0   0x0008 0000 to 0x0008 FFFF  Normal word (48) Space (3 Mbits ROM)
//   Block 0   0x0009 0000 to 0x0009 3FFF  Normal word (48) Space (0.75 Mbit RAM)
//   Block 0   0x0009 E000 to 0x0009 FFFF  Reserved address space (0.25 Mbit)

//   Block 1   0x000A 0000 to 0x000A FFFF  Normal word (48) Space (3 Mbits ROM)
//   Block 1   0x000B 0000 to 0x000B 3FFF  Normal word (48) Space (0.75 Mbit RAM)
//   Block 1   0x000B E000 to 0x000B FFFF  Reserved address space (0.25 Mbit)

//   Block 2   0x000C 0000 to 0x000C 1554  Normal word (48) Space (0.25 Mbit RAM)
//   Block 2   0x000C 2000 to 0x000C 3FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 2   0x000C 4000 to 0x000D FFFF  Internal Memory (Reserved 3.5 Mbits)

//   Block 3   0x000E 0000 to 0x000E 1554  Normal word (48) Space (0.25 Mbit RAM)
//   Block 3   0x000E 2000 to 0x000E 3FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 3   0x000E 4000 to 0x000F FFFF  Internal Memory (Reserved 3.5 Mbits)

//   ------------------------------------------------------------------------
//       Normal word (32-bit) space. Address range 0x0008 0000 to 0x000F FFFF
//   ------------------------------------------------------------------------

//   Block 0   0x0008 0000 to 0x0009 7FFF  Normal word (32) Space (3 Mbits ROM)
//   Block 0   0x0009 8000 to 0x0009 DFFF  Normal word (32) Space (0.75 Mbit RAM)
//   Block 0   0x0009 E000 to 0x0009 FFFF  Reserved address space (0.25 Mbit)

//   Block 1   0x000A 0000 to 0x000B 7FFF  Normal word (32) Space (3 Mbits ROM)
//   Block 1   0x000B 8000 to 0x000B DFFF  Normal word (32) Space (0.75 Mbit RAM)
//   Block 1   0x000B E000 to 0x000B FFFF  Reserved address space (0.25 Mbit)

//   Block 2   0x000C 0000 to 0x000C 1FFF  Normal word (32) Space (0.25 Mbit RAM)
//   Block 2   0x000C 2000 to 0x000C 3FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 2   0x000C 4000 to 0x000D FFFF  Internal Memory (Reserved 3.5 Mbits)

//   Block 3   0x000E 0000 to 0x000E 1FFF  Normal word (32) Space (0.25 Mbit RAM)
//   Block 3   0x000E 2000 to 0x000E 3FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 3   0x000E 4000 to 0x000F FFFF  Internal Memory (Reserved 3.5 Mbits)

//
//   -----------------------------------------------------------------------
//       Short word (16-bit) space. Address range 0x0010 0000 to 0x001F FFFF
//   -----------------------------------------------------------------------
//
//   Block 0   0x0010 0000 to 0x0012 FFFF  Short word (16) Space (3 Mbits ROM)
//   Block 0   0x0013 0000 to 0x0013 BFFF  Short word (16) Space (0.75 Mbit RAM)
//   Block 0   0x0013 C000 to 0x0013 FFFF  Reserved address space (0.25 Mbit)

//   Block 1   0x0014 0000 to 0x0016 FFFF  Short word (16) Space (3 Mbits ROM)
//   Block 1   0x0017 0000 to 0x0017 BFFF  Short word (16) Space (0.75 Mbit RAM)
//   Block 1   0x0017 C000 to 0x0017 FFFF  Reserved address space (0.25 Mbit)

//   Block 2   0x0018 0000 to 0x0018 3FFF  Short word (16) Space (0.25 Mbit RAM)
//   Block 2   0x0018 4000 to 0x0018 7FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 2   0x0018 8000 to 0x001B FFFF  Internal Memory (Reserved 3.5 Mbits)

//   Block 3   0x001C 0000 to 0x001C 3FFF  Short word (16) Space (0.25 Mbit RAM)
//   Block 3   0x001C 4000 to 0x001c 7FFF  Internal Memory (Reserved 0.25 Mbits)
//   Block 3   0x001C 8000 to 0x001F FFFF  Internal Memory (Reserved 3.5 Mbits)


// This architecture file allocates:
//         Internal 256 words of run-time header in memory block 0
//                   9K words of PM code space in memory block 0
//                   1K words of PM data space in memory block 0
//                   8K words of DM data space in memory block 0
//                  24k words of Normal-Word DM data space in memory block 1

SEARCH_DIR( $ADI_DSP\213xx\lib )

// Libraries from the command line are included in COMMAND_LINE_OBJECTS.
$OBJECTS = $COMMAND_LINE_OBJECTS;

MEMORY
{
    seg_rth  { TYPE(PM RAM) START(0x00090000) END(0x000900ff) WIDTH(48) }
    seg_pmco { TYPE(PM RAM) START(0x00090100) END(0x000925FF) WIDTH(48) }
    seg_pmda { TYPE(PM RAM) START(0x0009B900) END(0x0009BDAA) WIDTH(32) }
    seg_dm32 { TYPE(DM RAM) START(0x0009BDAB) END(0x0009DFFF) WIDTH(32) }
    seg_dmda { TYPE(DM RAM) START(0x000B8000) END(0x000BDFFF) WIDTH(32) }
}


PROCESSOR p0
{
    LINK_AGAINST( $COMMAND_LINE_LINK_AGAINST)
    OUTPUT( $COMMAND_LINE_OUTPUT_FILE )

    SECTIONS
    {

        seg_rth
        {
            INPUT_SECTIONS( $OBJECTS(seg_rth))

        } >seg_rth

        seg_pmco
        {
            INPUT_SECTIONS( $OBJECTS(seg_pmco))
        } >seg_pmco

        seg_pmda
        {
            INPUT_SECTIONS( $OBJECTS(seg_pmda))
        } >seg_pmda

        seg_dm32
        {
            INPUT_SECTIONS( $OBJECTS(seg_dm32))
        } > seg_dm32

        seg_dmda
        {
            INPUT_SECTIONS( $OBJECTS(seg_dmda))
        } > seg_dmda

    }
}