--  偶數分頻器,分頻比為2(N+1)
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY FREDEVIDER10 IS
PORT
   (CLKIN:IN STD_LOGIC;
    CLKOUT:OUT STD_LOGIC);
END;

ARCHITECTURE ART OF FREDEVIDER10 IS
CONSTANT N:INTEGER:=99;                --定義常數N,默認參數為3，即8分頻
SIGNAL COUNTER:INTEGER RANGE 0 TO N;  --引用常數N
SIGNAL CLK:STD_LOGIC;
BEGIN 
    PROCESS(CLKIN)
   BEGIN
      IF RISING_EDGE(CLKIN) THEN
         IF COUNTER=N THEN            --第二次引用常數N
            COUNTER<=0;
            CLK<=NOT CLK;
         ELSE
            COUNTER<=COUNTER+1;
         END IF;
      END IF;
   END PROCESS;
 CLKOUT<=CLK;
END;