LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;

ENTITY MC14585 IS 
    PORT(
         A,B:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
         IN_G,IN_E,IN_L:IN STD_LOGIC;
         OUT_G,OUT_E,OUT_L:OUT STD_LOGIC
        );
END MC14585;

ARCHITECTURE BEHAVIOR OF MC14585 IS 
SIGNAL S:STD_LOGIC_VECTOR(2 DOWNTO 0);
SIGNAL SOUT:STD_LOGIC_VECTOR(2 DOWNTO 0);
BEGIN
    S<=IN_G&IN_E&IN_L;
    PROCESS(S,A,B)
        BEGIN
           IF A>B THEN 
               SOUT<="100"; 
           ELSIF A<B THEN
               SOUT<="001";
           ELSIF A=B THEN
               CASE S IS 
                   WHEN "100" => SOUT<="100";
                   WHEN "010" => SOUT<="010";
                   WHEN "001" => SOUT<="001";
                   WHEN OTHERS => NULL;
               END CASE;
           ELSE 
               NULL;
           END IF;
     END PROCESS;
OUT_G<=SOUT(2);
OUT_E<=SOUT(1);
OUT_L<=SOUT(0);
END BEHAVIOR;