|pwm_control
rst => cnt4[1].ACLR
rst => cnt4[0].ACLR
rst => speed[3].ACLR
rst => speed[2].ACLR
rst => speed[1].ACLR
rst => speed[0].ACLR
rst => agb.ACLR
rst => cnt16[3].ACLR
rst => cnt16[2].ACLR
rst => cnt16[1].ACLR
rst => cnt16[0].ACLR
rst => z~reg0.ACLR
rst => f~reg0.ACLR
Level => cnt4[1].CLK
Level => cnt4[0].CLK
clk => speed[3].CLK
clk => speed[2].CLK
clk => speed[1].CLK
clk => speed[0].CLK
clk => agb.CLK
clk => cnt16[3].CLK
clk => cnt16[2].CLK
clk => cnt16[1].CLK
clk => cnt16[0].CLK
clk => z~reg0.CLK
clk => f~reg0.CLK
Z_F => f~0.OUTPUTSELECT
Z_F => z~0.OUTPUTSELECT
z <= z~reg0.DB_MAX_OUTPUT_PORT_TYPE
f <= f~reg0.DB_MAX_OUTPUT_PORT_TYPE
level_display0 <= cnt4[0].DB_MAX_OUTPUT_PORT_TYPE
level_display1 <= cnt4[1].DB_MAX_OUTPUT_PORT_TYPE