?? deccounter.map.qmsg
字號:
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.1 Build 156 04/30/2007 SJ Full Version " "Info: Version 7.1 Build 156 04/30/2007 SJ Full Version" { } { } 0 0 "%1!s!" 0 0 "" 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Dec 25 14:28:54 2007 " "Info: Processing started: Tue Dec 25 14:28:54 2007" { } { } 0 0 "Processing started: %1!s!" 0 0 "" 0} } { } 4 0 "Running %2!s! %1!s!" 0 0 "" 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off deccounter -c deccounter " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off deccounter -c deccounter" { } { } 0 0 "Command: %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "../練習/TEST.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ../練習/TEST.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 TEST-behav " "Info: Found design unit 1: TEST-behav" { } { { "../練習/TEST.vhd" "" { Text "E:/EDA/練習/TEST.vhd" 11 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 TEST " "Info: Found entity 1: TEST" { } { { "../練習/TEST.vhd" "" { Text "E:/EDA/練習/TEST.vhd" 4 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "CNT4B.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file CNT4B.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 CNT4B-behav " "Info: Found design unit 1: CNT4B-behav" { } { { "CNT4B.vhd" "" { Text "E:/EDA/實驗六/CNT4B.vhd" 11 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 CNT4B " "Info: Found entity 1: CNT4B" { } { { "CNT4B.vhd" "" { Text "E:/EDA/實驗六/CNT4B.vhd" 4 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "TESTCTL.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file TESTCTL.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 TESTCTL-behav " "Info: Found design unit 1: TESTCTL-behav" { } { { "TESTCTL.vhd" "" { Text "E:/EDA/實驗六/TESTCTL.vhd" 8 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 TESTCTL " "Info: Found entity 1: TESTCTL" { } { { "TESTCTL.vhd" "" { Text "E:/EDA/實驗六/TESTCTL.vhd" 4 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "REG4B.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file REG4B.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 REG4B-behav " "Info: Found design unit 1: REG4B-behav" { } { { "REG4B.vhd" "" { Text "E:/EDA/實驗六/REG4B.vhd" 8 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0 "" 0} { "Info" "ISGN_ENTITY_NAME" "1 REG4B " "Info: Found entity 1: REG4B" { } { { "REG4B.vhd" "" { Text "E:/EDA/實驗六/REG4B.vhd" 3 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "deccounter.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file deccounter.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 deccounter " "Info: Found entity 1: deccounter" { } { { "deccounter.bdf" "" { Schematic "E:/EDA/實驗六/deccounter.bdf" { } } } } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "TEST " "Info: Elaborating entity \"TEST\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "CQI TEST.vhd(35) " "Warning (10492): VHDL Process Statement warning at TEST.vhd(35): signal \"CQI\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" { } { { "../練習/TEST.vhd" "" { Text "E:/EDA/練習/TEST.vhd" 35 0 0 } } } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0 "" 0}
{ "Error" "EVRFX_VHDL_EXPR_ELEMENT_NUMBER_MISMATCH" "4 8 TEST.vhd(35) " "Error (10344): VHDL expression error at TEST.vhd(35): expression has 4 elements, but must have 8 elements" { } { { "../練習/TEST.vhd" "" { Text "E:/EDA/練習/TEST.vhd" 35 0 0 } } } 0 10344 "VHDL expression error at %3!s!: expression has %1!d! elements, but must have %2!d! elements" 0 0 "" 0}
{ "Error" "ESGN_TOP_HIER_ELABORATION_FAILURE" "" "Error: Can't elaborate top-level user hierarchy" { } { } 0 0 "Can't elaborate top-level user hierarchy" 0 0 "" 0}
{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 2 s 1 Quartus II " "Error: Quartus II Analysis & Synthesis was unsuccessful. 2 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "146 " "Info: Allocated 146 megabytes of memory during processing" { } { } 0 0 "Allocated %1!s! megabytes of memory during processing" 0 0 "" 0} { "Error" "EQEXE_END_BANNER_TIME" "Tue Dec 25 14:28:58 2007 " "Error: Processing ended: Tue Dec 25 14:28:58 2007" { } { } 0 0 "Processing ended: %1!s!" 0 0 "" 0} { "Error" "EQEXE_ELAPSED_TIME" "00:00:04 " "Error: Elapsed time: 00:00:04" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "" 0} } { } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0}
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