?? data_mux.pin
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-- Copyright (C) 1991-2004 Altera Corporation
-- Any megafunction design, and related netlist (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only
-- to program PLD devices (but not masked PLD devices) from Altera. Any
-- other use of such megafunction design, netlist, support information,
-- device programming or simulation file, or any other related documentation
-- or information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to the
-- intellectual property, including patents, copyrights, trademarks, trade
-- secrets, or maskworks, embodied in any such megafunction design, netlist,
-- support information, device programming or simulation file, or any other
-- related documentation or information provided by Altera or a megafunction
-- partner, remains with Altera, the megafunction partner, or their respective
-- licensors. No other licenses, including any licenses needed under any third
-- party's intellectual property, are provided herein.
--
-- This is a Quartus II output file. It is for reporting purposes only, and is
-- not intended for use as a Quartus II input file. This file cannot be used
-- to make Quartus II pin assignments - for instructions on how to make pin
-- assignments, please see Quartus II help.
---------------------------------------------------------------------------------
---------------------------------------------------------------------------------
-- NC : No Connect. This pin has no internal connection to the device.
-- VCC : Dedicated power pin, which MUST be connected to VCC.
-- VCCIO : Dedicated power pin, which MUST be connected to VCC
-- of its bank.
-- GND : Dedicated ground pin. Dedicated GND pins MUST be connected to GND.
-- It can also be used to report unused dedicated pins. The connection
-- on the board for unused dedicated pins depends on whether this will
-- be used in a future design. One example is device migration. When
-- using device migration, refer to the device pin-tables. If it is a
-- GND pin in the pin table or if it will not be used in a future design
-- for another purpose the it MUST be connected to GND. If it is an unused
-- dedicated pin, then it can be connected to a valid signal on the board
-- (low, high, or toggling) if that signal is required for a different
-- revision of the design.
-- GND+ : Unused input pin. It can also be used to report unused dual-purpose pins.
-- This pin should be connected to GND. It may also be connected to a
-- valid signal on the board (low, high, or toggling) if that signal
-- is required for a different revision of the design.
-- GND* : Unused I/O pin. This pin can either be left unconnected or
-- connected to GND. Connecting this pin to GND will improve the
-- device's immunity to noise.
-- RESERVED : Unused I/O pin, which MUST be left unconnected.
-- RESERVED_INPUT : Pin is tri-stated and should be connected to the board.
-- NON_MIGRATABLE: This pin cannot be migrated.
---------------------------------------------------------------------------------
Quartus II Version 4.2 Build 157 12/07/2004 SJ Full Version
CHIP "data_mux" ASSIGNED TO AN: EPM7032SLC44-5
Pin Name/Usage : Location : Dir. : I/O Standard : Voltage : I/O Bank : User Assignment
-------------------------------------------------------------------------------------------------------------
A2[3] : 1 : input : TTL : : : N
A3[0] : 2 : input : TTL : : : N
VCC : 3 : power : : : :
A2[0] : 4 : input : TTL : : : N
Q[0] : 5 : output : TTL : : : N
A4[3] : 6 : input : TTL : : : N
TDI : 7 : input : TTL : : : N
Q[1] : 8 : output : TTL : : : N
A4[1] : 9 : input : TTL : : : N
GND : 10 : gnd : : : :
Q[3] : 11 : output : TTL : : : N
A1[2] : 12 : input : TTL : : : N
TMS : 13 : input : TTL : : : N
Q[2] : 14 : output : TTL : : : N
VCC : 15 : power : : : :
A5[2] : 16 : input : TTL : : : N
A5[1] : 17 : input : TTL : : : N
A0[1] : 18 : input : TTL : : : N
A0[2] : 19 : input : TTL : : : N
A5[0] : 20 : input : TTL : : : N
disp_select[1] : 21 : input : TTL : : : N
GND : 22 : gnd : : : :
VCC : 23 : power : : : :
disp_select[2] : 24 : input : TTL : : : N
A0[3] : 25 : input : TTL : : : N
A3[3] : 26 : input : TTL : : : N
A3[2] : 27 : input : TTL : : : N
A3[1] : 28 : input : TTL : : : N
A0[0] : 29 : input : TTL : : : N
GND : 30 : gnd : : : :
A1[3] : 31 : input : TTL : : : N
TCK : 32 : input : TTL : : : N
A5[3] : 33 : input : TTL : : : N
A1[1] : 34 : input : TTL : : : N
VCC : 35 : power : : : :
A4[0] : 36 : input : TTL : : : N
A1[0] : 37 : input : TTL : : : N
TDO : 38 : output : TTL : : : N
A4[2] : 39 : input : TTL : : : N
A2[2] : 40 : input : TTL : : : N
RESERVED : 41 : : : : :
GND : 42 : gnd : : : :
A2[1] : 43 : input : TTL : : : N
disp_select[0] : 44 : input : TTL : : : N
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