?? data_mux.sim.vwf

?? 采用Verilog HDL語言編寫的數字頻率計
?? VWF
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		}
		LEVEL 1 FOR 50.0;
	}
}

TRANSITION_LIST("A4[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 30.0;
		NODE
		{
			REPEAT = 12;
			LEVEL 1 FOR 40.0;
			LEVEL 0 FOR 40.0;
		}
		LEVEL 1 FOR 10.0;
	}
}

TRANSITION_LIST("A4[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 10.0;
		NODE
		{
			REPEAT = 24;
			LEVEL 1 FOR 20.0;
			LEVEL 0 FOR 20.0;
		}
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 10.0;
	}
}

TRANSITION_LIST("A4[0]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 50;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
	}
}

TRANSITION_LIST("A5[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 30.0;
		NODE
		{
			REPEAT = 6;
			LEVEL 1 FOR 80.0;
			LEVEL 0 FOR 80.0;
		}
		LEVEL 1 FOR 10.0;
	}
}

TRANSITION_LIST("A5[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 40.0;
		LEVEL 0 FOR 30.0;
		NODE
		{
			REPEAT = 11;
			LEVEL 1 FOR 40.0;
			LEVEL 0 FOR 40.0;
		}
		LEVEL 1 FOR 40.0;
		LEVEL 0 FOR 10.0;
	}
}

TRANSITION_LIST("A5[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 10.0;
		NODE
		{
			REPEAT = 24;
			LEVEL 1 FOR 20.0;
			LEVEL 0 FOR 20.0;
		}
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 10.0;
	}
}

TRANSITION_LIST("A5[0]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 50;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
		}
	}
}

TRANSITION_LIST("Q[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 15.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 5.0;
	}
}

TRANSITION_LIST("Q[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 15.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		NODE
		{
			REPEAT = 11;
			LEVEL 1 FOR 20.0;
			LEVEL 0 FOR 20.0;
			NODE
			{
				REPEAT = 2;
				LEVEL 1 FOR 10.0;
				LEVEL 0 FOR 10.0;
			}
		}
		LEVEL 1 FOR 20.0;
		LEVEL 0 FOR 20.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 5.0;
	}
}

TRANSITION_LIST("Q[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 15.0;
		NODE
		{
			REPEAT = 12;
			LEVEL 1 FOR 10.0;
			LEVEL 0 FOR 10.0;
			LEVEL 1 FOR 20.0;
			LEVEL 0 FOR 40.0;
		}
		LEVEL 1 FOR 10.0;
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 5.0;
	}
}

TRANSITION_LIST("Q[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 15.0;
		NODE
		{
			REPEAT = 12;
			LEVEL 0 FOR 10.0;
			LEVEL 1 FOR 40.0;
			LEVEL 0 FOR 20.0;
			LEVEL 1 FOR 10.0;
		}
		LEVEL 0 FOR 10.0;
		LEVEL 1 FOR 15.0;
	}
}

TRANSITION_LIST("disp_select[2]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 12;
			LEVEL 0 FOR 40.0;
			LEVEL 1 FOR 40.0;
		}
		LEVEL 0 FOR 40.0;
	}
}

TRANSITION_LIST("disp_select[1]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 25;
			LEVEL 0 FOR 20.0;
			LEVEL 1 FOR 20.0;
		}
	}
}

TRANSITION_LIST("disp_select[0]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 50;
			LEVEL 0 FOR 10.0;
			LEVEL 1 FOR 10.0;
		}
	}
}

DISPLAY_LINE
{
	CHANNEL = "A0";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
	CHILDREN = 1, 2, 3, 4;
}

DISPLAY_LINE
{
	CHANNEL = "A0[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "A0[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 2;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "A0[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 3;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "A0[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 4;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "A1";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 0;
	CHILDREN = 6, 7, 8, 9;
}

DISPLAY_LINE
{
	CHANNEL = "A1[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 1;
	PARENT = 5;
}

DISPLAY_LINE
{
	CHANNEL = "A1[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 7;
	TREE_LEVEL = 1;
	PARENT = 5;
}

DISPLAY_LINE
{
	CHANNEL = "A1[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 5;
}

DISPLAY_LINE
{
	CHANNEL = "A1[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 5;
}

DISPLAY_LINE
{
	CHANNEL = "A2";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 10;
	TREE_LEVEL = 0;
	CHILDREN = 11, 12, 13, 14;
}

DISPLAY_LINE
{
	CHANNEL = "A2[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "A2[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "A2[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 13;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "A2[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 10;
}

DISPLAY_LINE
{
	CHANNEL = "A3";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 15;
	TREE_LEVEL = 0;
	CHILDREN = 16, 17, 18, 19;
}

DISPLAY_LINE
{
	CHANNEL = "A3[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 15;
}

DISPLAY_LINE
{
	CHANNEL = "A3[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 17;
	TREE_LEVEL = 1;
	PARENT = 15;
}

DISPLAY_LINE
{
	CHANNEL = "A3[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 15;
}

DISPLAY_LINE
{
	CHANNEL = "A3[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 15;
}

DISPLAY_LINE
{
	CHANNEL = "A4";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 20;
	TREE_LEVEL = 0;
	CHILDREN = 21, 22, 23, 24;
}

DISPLAY_LINE
{
	CHANNEL = "A4[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 20;
}

DISPLAY_LINE
{
	CHANNEL = "A4[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 22;
	TREE_LEVEL = 1;
	PARENT = 20;
}

DISPLAY_LINE
{
	CHANNEL = "A4[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 23;
	TREE_LEVEL = 1;
	PARENT = 20;
}

DISPLAY_LINE
{
	CHANNEL = "A4[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 24;
	TREE_LEVEL = 1;
	PARENT = 20;
}

DISPLAY_LINE
{
	CHANNEL = "A5";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 25;
	TREE_LEVEL = 0;
	CHILDREN = 26, 27, 28, 29;
}

DISPLAY_LINE
{
	CHANNEL = "A5[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 26;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "A5[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 27;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "A5[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 28;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "A5[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 29;
	TREE_LEVEL = 1;
	PARENT = 25;
}

DISPLAY_LINE
{
	CHANNEL = "disp_select";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 30;
	TREE_LEVEL = 0;
	CHILDREN = 31, 32, 33;
}

DISPLAY_LINE
{
	CHANNEL = "disp_select[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 31;
	TREE_LEVEL = 1;
	PARENT = 30;
}

DISPLAY_LINE
{
	CHANNEL = "disp_select[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 32;
	TREE_LEVEL = 1;
	PARENT = 30;
}

DISPLAY_LINE
{
	CHANNEL = "disp_select[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 33;
	TREE_LEVEL = 1;
	PARENT = 30;
}

DISPLAY_LINE
{
	CHANNEL = "Q";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 34;
	TREE_LEVEL = 0;
	CHILDREN = 35, 36, 37, 38;
}

DISPLAY_LINE
{
	CHANNEL = "Q[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 35;
	TREE_LEVEL = 1;
	PARENT = 34;
}

DISPLAY_LINE
{
	CHANNEL = "Q[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 36;
	TREE_LEVEL = 1;
	PARENT = 34;
}

DISPLAY_LINE
{
	CHANNEL = "Q[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 37;
	TREE_LEVEL = 1;
	PARENT = 34;
}

DISPLAY_LINE
{
	CHANNEL = "Q[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 38;
	TREE_LEVEL = 1;
	PARENT = 34;
}

TIME_BAR
{
	TIME = 0;
	MASTER = TRUE;
}
;
上一頁 12
?? 文件大小 1224 K
?? 上傳用戶 sfdong
?? 所屬分類 VHDL/FPGA/Verilog
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?? data_mux.sim.vwf

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