{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Jan 18 19:58:02 2008 " "Info: Processing started: Fri Jan 18 19:58:02 2008" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off speaker -c speaker --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off speaker -c speaker --timing_analysis_only" {  } {  } 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" {  } { { "speaker.v" "" { Text "D:/FPGAtest/speaker/speaker.v" 2 -1 0 } } { "c:/altera/quartus501/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus501/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0}  } {  } 0}