// Copyright (C) 1991-2006 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.

// VENDOR "Altera"
// PROGRAM "Quartus II"
// VERSION "Version 6.0 Build 178 04/27/2006 SJ Full Version"

// DATE "08/23/2007 13:45:58"

// 
// Device: Altera EPM1270T144C5 Package TQFP144
// 

// 
// This Verilog file should be used for ModelSim (Verilog) only
// 

`timescale 1 ps/ 1 ps

module control8080 (
	clk,
	rst,
	RS,
	RW,
	EN,
	data,
	ram_data);
input 	clk;
input 	rst;
input 	RS;
input 	RW;
input 	EN;
inout 	[7:0] data;
output 	[7:0] ram_data;

wire gnd = 1'b0;
wire vcc = 1'b1;

tri1 devclrn;
tri1 devpor;
tri0 devoe;
// synopsys translate_off
initial $sdf_annotate("control8080_v.sdo");
// synopsys translate_on

wire \data[0]~7 ;
wire \data[1]~6 ;
wire \data[2]~5 ;
wire \data[3]~4 ;
wire \data[4]~3 ;
wire \data[5]~2 ;
wire \data[6]~1 ;
wire \data[7]~0 ;
wire \clk~combout ;
wire \rst~combout ;
wire \RW~combout ;
wire \EN~combout ;
wire \RS~combout ;
wire \comb_4|commod[0]~1958 ;
wire \comb_4|commod[0]~1961 ;
wire \comb_4|commod[0]~1962 ;
wire \comb_4|commod[0]~1963 ;
wire \comb_4|always1~95 ;
wire \comb_4|commod[0]~1964 ;
wire \comb_4|commod[0]~1965 ;
wire \comb_4|commod[0]~1966 ;
wire \comb_4|commod[0]~1957 ;
wire \comb_4|commod[0]~1959 ;
wire \comb_4|commod[0]~1960 ;
wire \comb_4|ram_write_o[5]~460 ;
wire \comb_4|en0 ;
wire \comb_4|en1 ;
wire \comb_4|write ;
wire \comb_4|ram_write_o[5]~469 ;
wire \comb_4|cmd_read[6]~671 ;
wire \comb_4|ram_write_o[5]~461 ;
wire \comb_4|ram_addr_o[3]~383 ;
wire \comb_4|ram_addr_o[3]~384 ;
wire \comb_4|ram_write_o~462 ;
wire \comb_4|cmd_reg1[0]~772 ;
wire \comb_4|cmd_reg2[5]~762 ;
wire \comb_4|commod[0]~1971 ;
wire \comb_4|cmd_reg3_o[3]~210 ;
wire \comb_4|cmd_read[6]~673 ;
wire \comb_4|cmd_reg4[4]~762 ;
wire \comb_4|cmd_reg3[6]~763 ;
wire \comb_4|cmd_read[6]~672 ;
wire \comb_4|cmd_reg1[0]~773 ;
wire \comb_4|cmd_read~678 ;
wire \comb_4|cmd_read~679 ;
wire \comb_4|Selector0~136 ;
wire \comb_4|cmd_read[6]~676 ;
wire \comb_4|cmd_read[6]~677 ;
wire \comb_4|out_flag ;
wire \comb_4|ram_write_o~463 ;
wire \comb_4|cmd_read~680 ;
wire \comb_4|cmd_read~681 ;
wire \comb_4|ram_write_o~464 ;
wire \comb_4|cmd_read~682 ;
wire \comb_4|cmd_read~683 ;
wire \comb_4|ram_write_o~465 ;
wire \comb_4|cmd_read~684 ;
wire \comb_4|cmd_read~685 ;
wire \comb_4|ram_write_o~466 ;
wire \comb_4|cmd_read~686 ;
wire \comb_4|cmd_read~687 ;
wire \comb_4|ram_write_o~467 ;
wire \comb_4|cmd_read~688 ;
wire \comb_4|cmd_read~689 ;
wire \comb_4|ram_write_o~468 ;
wire \comb_4|cmd_read~690 ;
wire \comb_4|cmd_read~691 ;
wire \comb_4|ram_write_o~459 ;
wire \comb_4|cmd_read~674 ;
wire \comb_4|cmd_read~675 ;
wire \comb_4|data_out[0]~72 ;
wire \comb_4|read ;
wire \comb_4|data_out[1]~73 ;
wire \comb_4|data_out[2]~74 ;
wire \comb_4|data_out[3]~75 ;
wire \comb_4|data_out[4]~76 ;
wire \comb_4|data_out[5]~77 ;
wire \comb_4|data_out[6]~78 ;
wire \comb_4|data_out[7]~79 ;
wire [7:0] \comb_4|cmd_read ;
wire [7:0] \comb_4|cmd_reg1 ;
wire [7:0] \comb_4|cmd_reg1_o ;
wire [7:0] \comb_4|cmd_reg2 ;
wire [7:0] \comb_4|cmd_reg2_o ;
wire [7:0] \comb_4|cmd_reg3 ;
wire [7:0] \comb_4|cmd_reg3_o ;
wire [7:0] \comb_4|cmd_reg4 ;
wire [7:0] \comb_4|cmd_reg4_o ;
wire [3:0] \comb_4|commod ;
wire [7:0] \comb_4|data_in ;
wire [7:0] \comb_4|ram_addr_o ;
wire [7:0] \comb_4|ram_write_o ;


// atom is at PIN_96
maxii_io \data[0]~I (
	.datain(\comb_4|data_out[0]~72 ),
	.oe(\comb_4|read ),
	.combout(\data[0]~7 ),
	.padio(data[0]));
// synopsys translate_off
defparam \data[0]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_94
maxii_io \data[1]~I (
	.datain(\comb_4|data_out[1]~73 ),
	.oe(\comb_4|read ),
	.combout(\data[1]~6 ),
	.padio(data[1]));
// synopsys translate_off
defparam \data[1]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_95
maxii_io \data[2]~I (
	.datain(\comb_4|data_out[2]~74 ),
	.oe(\comb_4|read ),
	.combout(\data[2]~5 ),
	.padio(data[2]));
// synopsys translate_off
defparam \data[2]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_97
maxii_io \data[3]~I (
	.datain(\comb_4|data_out[3]~75 ),
	.oe(\comb_4|read ),
	.combout(\data[3]~4 ),
	.padio(data[3]));
// synopsys translate_off
defparam \data[3]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_101
maxii_io \data[4]~I (
	.datain(\comb_4|data_out[4]~76 ),
	.oe(\comb_4|read ),
	.combout(\data[4]~3 ),
	.padio(data[4]));
// synopsys translate_off
defparam \data[4]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_103
maxii_io \data[5]~I (
	.datain(\comb_4|data_out[5]~77 ),
	.oe(\comb_4|read ),
	.combout(\data[5]~2 ),
	.padio(data[5]));
// synopsys translate_off
defparam \data[5]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_105
maxii_io \data[6]~I (
	.datain(\comb_4|data_out[6]~78 ),
	.oe(\comb_4|read ),
	.combout(\data[6]~1 ),
	.padio(data[6]));
// synopsys translate_off
defparam \data[6]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_107
maxii_io \data[7]~I (
	.datain(\comb_4|data_out[7]~79 ),
	.oe(\comb_4|read ),
	.combout(\data[7]~0 ),
	.padio(data[7]));
// synopsys translate_off
defparam \data[7]~I .operation_mode = "bidir";
// synopsys translate_on

// atom is at PIN_18
maxii_io \clk~I (
	.datain(gnd),
	.oe(gnd),
	.combout(\clk~combout ),
	.padio(clk));
// synopsys translate_off
defparam \clk~I .operation_mode = "input";
// synopsys translate_on

// atom is at PIN_93
maxii_io \rst~I (
	.datain(gnd),
	.oe(gnd),
	.combout(\rst~combout ),
	.padio(rst));
// synopsys translate_off
defparam \rst~I .operation_mode = "input";
// synopsys translate_on

// atom is at PIN_106
maxii_io \RW~I (
	.datain(gnd),
	.oe(gnd),
	.combout(\RW~combout ),
	.padio(RW));
// synopsys translate_off
defparam \RW~I .operation_mode = "input";
// synopsys translate_on

// atom is at PIN_98
maxii_io \EN~I (
	.datain(gnd),
	.oe(gnd),
	.combout(\EN~combout ),
	.padio(EN));
// synopsys translate_off
defparam \EN~I .operation_mode = "input";
// synopsys translate_on

// atom is at PIN_104
maxii_io \RS~I (
	.datain(gnd),
	.oe(gnd),
	.combout(\RS~combout ),
	.padio(RS));
// synopsys translate_off
defparam \RS~I .operation_mode = "input";
// synopsys translate_on

// atom is at LC_X15_Y8_N5
maxii_lcell \comb_4|data_in[1]~I (
// Equation(s):
// \comb_4|data_in [1] = GLOBAL(\comb_4|write ) & (\data[1]~6 ) # !GLOBAL(\comb_4|write ) & \comb_4|data_in [1]

	.clk(gnd),
	.dataa(\comb_4|data_in [1]),
	.datab(\data[1]~6 ),
	.datac(\comb_4|write ),
	.datad(vcc),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|data_in [1]),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|data_in[1]~I .lut_mask = "CACA";
defparam \comb_4|data_in[1]~I .operation_mode = "normal";
defparam \comb_4|data_in[1]~I .output_mode = "comb_only";
defparam \comb_4|data_in[1]~I .register_cascade_mode = "off";
defparam \comb_4|data_in[1]~I .sum_lutc_input = "datac";
defparam \comb_4|data_in[1]~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X16_Y6_N4
maxii_lcell \comb_4|commod[0]~1958_I (
// Equation(s):
// \comb_4|commod[0]~1958  = !\comb_4|commod [1] & !\comb_4|commod [3]

	.clk(gnd),
	.dataa(vcc),
	.datab(vcc),
	.datac(\comb_4|commod [1]),
	.datad(\comb_4|commod [3]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|commod[0]~1958 ),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|commod[0]~1958_I .lut_mask = "000F";
defparam \comb_4|commod[0]~1958_I .operation_mode = "normal";
defparam \comb_4|commod[0]~1958_I .output_mode = "comb_only";
defparam \comb_4|commod[0]~1958_I .register_cascade_mode = "off";
defparam \comb_4|commod[0]~1958_I .sum_lutc_input = "datac";
defparam \comb_4|commod[0]~1958_I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X15_Y10_N8
maxii_lcell \comb_4|data_in[2]~I (
// Equation(s):
// \comb_4|data_in [2] = GLOBAL(\comb_4|write ) & \data[2]~5  # !GLOBAL(\comb_4|write ) & (\comb_4|data_in [2])

	.clk(gnd),
	.dataa(vcc),
	.datab(\data[2]~5 ),
	.datac(\comb_4|write ),
	.datad(\comb_4|data_in [2]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(\comb_4|data_in [2]),
	.regout(),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|data_in[2]~I .lut_mask = "CFC0";
defparam \comb_4|data_in[2]~I .operation_mode = "normal";
defparam \comb_4|data_in[2]~I .output_mode = "comb_only";
defparam \comb_4|data_in[2]~I .register_cascade_mode = "off";
defparam \comb_4|data_in[2]~I .sum_lutc_input = "datac";
defparam \comb_4|data_in[2]~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X14_Y8_N9
maxii_lcell \comb_4|commod[2]~I (
// Equation(s):
// \comb_4|commod [2] = DFFEAS(\comb_4|commod[0]~1966  & \comb_4|commod [2] # !\comb_4|commod[0]~1966  & (\comb_4|commod[0]~1960  & \comb_4|data_in [2]), GLOBAL(\clk~combout ), VCC, , , , , , )

	.clk(\clk~combout ),
	.dataa(\comb_4|commod [2]),
	.datab(\comb_4|commod[0]~1960 ),
	.datac(\comb_4|commod[0]~1966 ),
	.datad(\comb_4|data_in [2]),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\comb_4|commod [2]),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|commod[2]~I .lut_mask = "ACA0";
defparam \comb_4|commod[2]~I .operation_mode = "normal";
defparam \comb_4|commod[2]~I .output_mode = "reg_only";
defparam \comb_4|commod[2]~I .register_cascade_mode = "off";
defparam \comb_4|commod[2]~I .sum_lutc_input = "datac";
defparam \comb_4|commod[2]~I .synch_mode = "off";
// synopsys translate_on

// atom is at LC_X14_Y8_N6
maxii_lcell \comb_4|commod[0]~I (
// Equation(s):
// \comb_4|commod [0] = DFFEAS(\comb_4|commod[0]~1966  & \comb_4|commod [0] # !\comb_4|commod[0]~1966  & (\comb_4|commod[0]~1960  & \comb_4|data_in [0]), GLOBAL(\clk~combout ), VCC, , , , , , )

	.clk(\clk~combout ),
	.dataa(\comb_4|commod [0]),
	.datab(\comb_4|commod[0]~1960 ),
	.datac(\comb_4|data_in [0]),
	.datad(\comb_4|commod[0]~1966 ),
	.aclr(gnd),
	.aload(gnd),
	.sclr(gnd),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\comb_4|commod [0]),
	.cout(),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \comb_4|commod[0]~I .lut_mask = "AAC0";
defparam \comb_4|commod[0]~I .operation_mode = "normal";
defparam \comb_4|commod[0]~I .output_mode = "reg_only";
defparam \comb_4|commod[0]~I .register_cascade_mode = "off";
defparam \comb_4|commod[0]~I .sum_lutc_input = "datac";
defparam \comb_4|commod[0]~I .synch_mode = "off";
// synopsys translate_on