V3 48
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/cal_distant.vhd 2008/03/16.21:50:56 J.33
EN work/cal_distant 1205862446 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/cal_distant.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/cal_distant/Behavioral 1205862447 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/cal_distant.vhd \
      EN work/cal_distant 1205862446
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/counterdiv.vhd 2008/03/16.21:20:26 J.33
EN work/counterdiv 1205862438 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/counterdiv.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/counterdiv/Behavioral 1205862439 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/counterdiv.vhd \
      EN work/counterdiv 1205862438
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/counterdiv1.vhd 2007/11/12.21:33:08 J.33
EN work/counterdiv1 1205862448 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/counterdiv1.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/counterdiv1/Behavioral 1205862449 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/counterdiv1.vhd \
      EN work/counterdiv1 1205862448
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/couterx_choose.vhd 2007/11/11.23:53:52 J.33
EN work/couterx_choose 1205585838 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/couterx_choose.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/couterx_choose/Behavioral 1205585839 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/couterx_choose.vhd \
      EN work/couterx_choose 1205585838
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/data2.vhd 2008/03/19.00:34:18 J.33
EN work/collectdata 1205862454 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/data2.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719 LB UNISIM PH unisim/VCOMPONENTS 1173822169
AR work/collectdata/rtl 1205862455 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/data2.vhd \
      EN work/collectdata 1205862454 CP cal_distant CP counterdiv CP counterdiv1 \
      CP Disp CP uart1
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/Disp.vhd 2008/03/19.01:47:12 J.33
EN work/Disp 1205862450 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/Disp.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/Disp/Behavioral 1205862451 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/Disp.vhd \
      EN work/Disp 1205862450 CP counterdiv CP lcd_disp
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/div651.vhd 2007/11/27.21:08:30 J.33
EN work/div651 1205862440 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/div651.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/div651/rtl 1205862441 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/div651.vhd \
      EN work/div651 1205862440
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/lcd_disp.vhd 2008/03/16.22:15:04 J.33
EN work/lcd_disp 1205862444 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/lcd_disp.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/lcd_disp/Behavioral 1205862445 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/lcd_disp.vhd \
      EN work/lcd_disp 1205862444 CP counterdiv
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/segdisp.vhd 2007/11/12.01:40:28 J.33
EN work/seg7 1205585840 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/segdisp.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/seg7/Behavioral 1205585841 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/segdisp.vhd \
      EN work/seg7 1205585840
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/segselcounter.vhd 2007/11/11.23:57:22 J.33
EN work/segselcounter 1205585834 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/segselcounter.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/segselcounter/Behavioral 1205585835 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/segselcounter.vhd \
      EN work/segselcounter 1205585834
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/sel_decoder.vhd 2007/11/12.02:01:22 J.33
EN work/sel_decoder 1205585836 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/sel_decoder.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/sel_decoder/Behavioral 1205585837 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/sel_decoder.vhd \
      EN work/sel_decoder 1205585836
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/txdata.vhd 2007/11/28.00:05:16 J.33
EN work/txdata 1205862442 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/txdata.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/txdata/rtl 1205862443 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/txdata.vhd \
      EN work/txdata 1205862442
FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/uart1.vhd 2008/03/15.22:48:22 J.33
EN work/uart1 1205862452 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/uart1.vhd \
      PB ieee/std_logic_1164 1173395717 PB ieee/std_logic_arith 1173395718 \
      PB ieee/STD_LOGIC_UNSIGNED 1173395719
AR work/uart1/Behavioral 1205862453 \
      FL F:/E_Design/Projects/Xilinx_contest/final/MS_distant/vhdl/uart1.vhd \
      EN work/uart1 1205862452 CP div651 CP txdata