--lpm_mux CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone" LPM_SIZE=9 LPM_WIDTH=1 LPM_WIDTHS=4 data result sel
--VERSION_BEGIN 4.1 cbx_lpm_mux 2004:03:10:10:50:34:SJ cbx_mgl 2004:06:17:17:30:06:SJ  VERSION_END


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--  to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
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--synthesis_resources = lut 6 
SUBDESIGN mux_2bb
( 
	data[8..0]	:	input;
	result[0..0]	:	output;
	sel[3..0]	:	input;
) 
VARIABLE 
	muxlut_data0w[8..0]	: WIRE;
	muxlut_result0w	: WIRE;
	muxlut_select0w[3..0]	: WIRE;
	result_node[0..0]	: WIRE;
	sel_ffs_wire[3..0]	: WIRE;
	sel_node[3..0]	: WIRE;
	w104w	: WIRE;
	w105w[3..0]	: WIRE;
	w107w[1..0]	: WIRE;
	w108w	: WIRE;
	w128w[1..0]	: WIRE;
	w130w	: WIRE;
	w77w	: WIRE;
	w79w	: WIRE;
	w80w[3..0]	: WIRE;
	w82w[1..0]	: WIRE;
	w84w	: WIRE;
	w_mux_outputs78w[2..0]	: WIRE;

BEGIN 
	muxlut_data0w[] = ( data[8..0]);
	muxlut_result0w = w77w;
	muxlut_select0w[] = sel_node[];
	result[] = result_node[];
	result_node[] = ( muxlut_result0w);
	sel_ffs_wire[] = ( sel[3..0]);
	sel_node[] = ( sel_ffs_wire[3..2], sel[1..0]);
	w104w = w108w;
	w105w[3..0] = muxlut_data0w[7..4];
	w107w[1..0] = muxlut_select0w[1..0];
	w108w = ((((! w107w[1..1]) # (w107w[0..0] & w105w[3..3])) # ((! w107w[0..0]) & w105w[2..2])) & ((w107w[1..1] # (w107w[0..0] & w105w[1..1])) # ((! w107w[0..0]) & w105w[0..0])));
	w128w[1..0] = muxlut_select0w[3..2];
	w130w = (((! w128w[1..1]) # ((! w128w[0..0]) & w_mux_outputs78w[2..2])) & ((w128w[1..1] # (w128w[0..0] & w_mux_outputs78w[1..1])) # ((! w128w[0..0]) & w_mux_outputs78w[0..0])));
	w77w = w130w;
	w79w = w84w;
	w80w[3..0] = muxlut_data0w[3..0];
	w82w[1..0] = muxlut_select0w[1..0];
	w84w = ((((! w82w[1..1]) # (w82w[0..0] & w80w[3..3])) # ((! w82w[0..0]) & w80w[2..2])) & ((w82w[1..1] # (w82w[0..0] & w80w[1..1])) # ((! w82w[0..0]) & w80w[0..0])));
	w_mux_outputs78w[] = ( muxlut_data0w[8..8], w104w, w79w);
END;
--VALID FILE