# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		seg7_1a_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:57:54  APRIL 10, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 4.1
set_global_assignment -name VHDL_FILE seg7_1a.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE seg7_1a.vwf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_57 -to aa\[0\]
set_location_assignment PIN_56 -to aa\[1\]
set_location_assignment PIN_55 -to aa\[2\]
set_location_assignment PIN_54 -to aa\[3\]
set_location_assignment PIN_29 -to aaa\[0\]
set_location_assignment PIN_28 -to aaa\[1\]
set_location_assignment PIN_27 -to aaa\[2\]
set_location_assignment PIN_25 -to aaa\[3\]
set_location_assignment PIN_17 -to bb\[0\]
set_location_assignment PIN_16 -to bb\[1\]
set_location_assignment PIN_15 -to bb\[2\]
set_location_assignment PIN_12 -to bb\[3\]
set_location_assignment PIN_11 -to bb\[4\]
set_location_assignment PIN_10 -to bb\[5\]
set_location_assignment PIN_9 -to bb\[6\]
set_location_assignment PIN_35 -to cat\[0\]
set_location_assignment PIN_36 -to cat\[1\]
set_location_assignment PIN_37 -to cat\[2\]
set_location_assignment PIN_39 -to cat\[3\]
set_location_assignment PIN_40 -to cat\[4\]
set_location_assignment PIN_41 -to cat\[5\]

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PACKAGE PLCC
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 84
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 15
set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name TOP_LEVEL_ENTITY seg7_1a

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPM7128SLC84-15"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"

# Simulator Assignments
# =====================
set_global_assignment -name POWER_ESTIMATION_START_TIME "0.0 ns"
set_global_assignment -name GLITCH_DETECTION ON
set_global_assignment -name GLITCH_INTERVAL "1.0 ns"
set_global_assignment -name VECTOR_INPUT_SOURCE seg7_1a.vwf