?? voltage.map.rpt
字號:
Analysis & Synthesis report for voltage
Fri Oct 27 22:05:53 2006
Version 5.0 Build 148 04/26/2005 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Analysis & Synthesis Summary
3. Analysis & Synthesis Settings
4. Analysis & Synthesis Source Files Read
5. Analysis & Synthesis Resource Usage Summary
6. Analysis & Synthesis Resource Utilization by Entity
7. Analysis & Synthesis RAM Summary
8. User-Specified and Inferred Latches
9. General Register Statistics
10. Parameter Settings for User Entity Instance: LPM_ROM:data_L
11. Parameter Settings for User Entity Instance: LPM_ROM:data_H
12. Parameter Settings for User Entity Instance: LPM_COUNTER:sw_point
13. Parameter Settings for User Entity Instance: LPM_DECODE:scan_sw
14. Parameter Settings for Inferred Entity Instance: lpm_add_sub:add_rtl_0
15. Analysis & Synthesis Equations
16. Analysis & Synthesis Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+-----------------------------+------------------------------------------+
; Analysis & Synthesis Status ; Successful - Fri Oct 27 22:05:53 2006 ;
; Quartus II Version ; 5.0 Build 148 04/26/2005 SJ Full Version ;
; Revision Name ; voltage ;
; Top-level Entity Name ; voltage ;
; Family ; FLEX10K ;
; Total logic elements ; 131 ;
; Total pins ; 23 ;
; Total memory bits ; 3,072 ;
+-----------------------------+------------------------------------------+
+---------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings ;
+------------------------------------------------------------+----------------+---------------+
; Option ; Setting ; Default Value ;
+------------------------------------------------------------+----------------+---------------+
; Device ; EPF10K10LC84-4 ; ;
; Top-level entity name ; voltage ; voltage ;
; Family name ; FLEX10K ; Stratix ;
; Use smart compilation ; Off ; Off ;
; Create Debugging Nodes for IP Cores ; off ; off ;
; Preserve fewer node names ; On ; On ;
; Disable OpenCore Plus hardware evaluation ; Off ; Off ;
; Verilog Version ; Verilog_2001 ; Verilog_2001 ;
; VHDL Version ; VHDL93 ; VHDL93 ;
; State Machine Processing ; Auto ; Auto ;
; Extract Verilog State Machines ; On ; On ;
; Extract VHDL State Machines ; On ; On ;
; Add Pass-Through Logic to Inferred RAMs ; On ; On ;
; NOT Gate Push-Back ; On ; On ;
; Power-Up Don't Care ; On ; On ;
; Remove Redundant Logic Cells ; Off ; Off ;
; Remove Duplicate Registers ; On ; On ;
; Ignore CARRY Buffers ; Off ; Off ;
; Ignore CASCADE Buffers ; Off ; Off ;
; Ignore GLOBAL Buffers ; Off ; Off ;
; Ignore ROW GLOBAL Buffers ; Off ; Off ;
; Ignore LCELL Buffers ; Off ; Off ;
; Ignore SOFT Buffers ; On ; On ;
; Limit AHDL Integers to 32 Bits ; Off ; Off ;
; Auto Implement in ROM ; Off ; Off ;
; Optimization Technique -- FLEX 10K/10KE/10KA/ACEX 1K ; Area ; Area ;
; Carry Chain Length -- FLEX 10K ; 32 ; 32 ;
; Cascade Chain Length ; 2 ; 2 ;
; Auto Carry Chains ; On ; On ;
; Auto Open-Drain Pins ; On ; On ;
; Remove Duplicate Logic ; On ; On ;
; Auto ROM Replacement ; On ; On ;
; Auto RAM Replacement ; On ; On ;
; Auto Clock Enable Replacement ; On ; On ;
; Auto Resource Sharing ; Off ; Off ;
; Allow Any RAM Size For Recognition ; Off ; Off ;
; Allow Any ROM Size For Recognition ; Off ; Off ;
; Ignore translate_off and translate_on Synthesis Directives ; Off ; Off ;
; Show Parameter Settings Tables in Synthesis Report ; On ; On ;
+------------------------------------------------------------+----------------+---------------+
+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+------------------------------+---------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ;
+----------------------------------+-----------------+------------------------------+---------------------------------------------------------------------+
; voltage.vhd ; yes ; User VHDL File ; E:/yang/yl_vhdl/v1/voltage.vhd ;
; LPM_ROM.tdf ; yes ; Megafunction ; f:/altera/quartus50/libraries/megafunctions/LPM_ROM.tdf ;
; altrom.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/altrom.inc ;
; aglobal50.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/aglobal50.inc ;
; altrom.tdf ; yes ; Megafunction ; f:/altera/quartus50/libraries/megafunctions/altrom.tdf ;
; memmodes.inc ; yes ; Other ; f:/altera/quartus50/libraries/others/maxplus2/memmodes.inc ;
; lpm_decode.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/lpm_decode.inc ;
; lpm_mux.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/lpm_mux.inc ;
; altqpram.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/altqpram.inc ;
; altsyncram.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/altsyncram.inc ;
; LPM_COUNTER.tdf ; yes ; Megafunction ; f:/altera/quartus50/libraries/megafunctions/LPM_COUNTER.tdf ;
; lpm_constant.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/lpm_constant.inc ;
; lpm_add_sub.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/lpm_add_sub.inc ;
; cmpconst.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/cmpconst.inc ;
; lpm_compare.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/lpm_compare.inc ;
; lpm_counter.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/lpm_counter.inc ;
; dffeea.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/dffeea.inc ;
; alt_synch_counter.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/alt_synch_counter.inc ;
; alt_synch_counter_f.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.inc ;
; alt_counter_stratix.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/alt_counter_stratix.inc ;
; alt_counter_f10ke.tdf ; yes ; Megafunction ; f:/altera/quartus50/libraries/megafunctions/alt_counter_f10ke.tdf ;
; flex10ke_lcell.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/flex10ke_lcell.inc ;
; LPM_DECODE.tdf ; yes ; Megafunction ; f:/altera/quartus50/libraries/megafunctions/LPM_DECODE.tdf ;
; declut.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/declut.inc ;
; altshift.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/altshift.inc ;
; db/decode_f9c.tdf ; yes ; Auto-Generated Megafunction ; E:/yang/yl_vhdl/v1/db/decode_f9c.tdf ;
; lpm_add_sub.tdf ; yes ; Megafunction ; f:/altera/quartus50/libraries/megafunctions/lpm_add_sub.tdf ;
; addcore.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/addcore.inc ;
; look_add.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/look_add.inc ;
; bypassff.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/bypassff.inc ;
; alt_stratix_add_sub.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/alt_stratix_add_sub.inc ;
; alt_mercury_add_sub.inc ; yes ; Other ; f:/altera/quartus50/libraries/megafunctions/alt_mercury_add_sub.inc ;
; addcore.tdf ; yes ; Megafunction ; f:/altera/quartus50/libraries/megafunctions/addcore.tdf ;
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