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--K1_q_a[0] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[0] at M4K_X19_Y20
--RAM Block Operation Mode: ROM
--Port A Depth: 128, Port A Width: 8
--Port A Logical Depth: 128, Port A Logical Width: 8
--Port A Input: Registered, Port A Output: Registered
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[0] = K1_q_a[0]_PORT_A_data_out_reg[0];

--K1_q_a[7] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[7] at M4K_X19_Y20
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[7] = K1_q_a[0]_PORT_A_data_out_reg[7];

--K1_q_a[6] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[6] at M4K_X19_Y20
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[6] = K1_q_a[0]_PORT_A_data_out_reg[6];

--K1_q_a[5] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[5] at M4K_X19_Y20
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[5] = K1_q_a[0]_PORT_A_data_out_reg[5];

--K1_q_a[4] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[4] at M4K_X19_Y20
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[4] = K1_q_a[0]_PORT_A_data_out_reg[4];

--K1_q_a[3] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[3] at M4K_X19_Y20
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[3] = K1_q_a[0]_PORT_A_data_out_reg[3];

--K1_q_a[2] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[2] at M4K_X19_Y20
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[2] = K1_q_a[0]_PORT_A_data_out_reg[2];

--K1_q_a[1] is DDS1:u1|sin_rom:u3|altsyncram:altsyncram_component|altsyncram_5mp:auto_generated|q_a[1] at M4K_X19_Y20
K1_q_a[0]_PORT_A_address = BUS(~GND, C1L7, G2_DOUT[2], G2_DOUT[3], G2_DOUT[4], G2_DOUT[5], G2_DOUT[6]);
K1_q_a[0]_PORT_A_address_reg = DFFE(K1_q_a[0]_PORT_A_address, K1_q_a[0]_clock_0, , , );
K1_q_a[0]_clock_0 = GLOBAL(CLK);
K1_q_a[0]_PORT_A_data_out = MEMORY(, , K1_q_a[0]_PORT_A_address_reg, , , , , , K1_q_a[0]_clock_0, , , , , );
K1_q_a[0]_PORT_A_data_out_reg = DFFE(K1_q_a[0]_PORT_A_data_out, K1_q_a[0]_clock_0, , , );
K1_q_a[1] = K1_q_a[0]_PORT_A_data_out_reg[1];


--D1_y is PL_DPSK2:u2|y at LC_X16_Y20_N2
--operation mode is normal

D1_y_lut_out = D1_xx1 $ D1_xx2;
D1_y = DFFEAS(D1_y_lut_out, GLOBAL(CLK), VCC, , D1L72, , , , );


--C1_q[0] is DDS1:u1|q[0] at LC_X12_Y20_N0
--operation mode is arithmetic

C1_q[0]_lut_out = !C1_q[0];
C1_q[0] = DFFEAS(C1_q[0]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L5 is DDS1:u1|q[0]~78 at LC_X12_Y20_N0
--operation mode is arithmetic

C1L5_cout_0 = C1_q[0];
C1L5 = CARRY(C1L5_cout_0);

--C1L6 is DDS1:u1|q[0]~78COUT1_115 at LC_X12_Y20_N0
--operation mode is arithmetic

C1L6_cout_1 = C1_q[0];
C1L6 = CARRY(C1L6_cout_1);


--C1_q[1] is DDS1:u1|q[1] at LC_X12_Y20_N1
--operation mode is arithmetic

C1_q[1]_lut_out = C1_q[1] $ (C1L5);
C1_q[1] = DFFEAS(C1_q[1]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L9 is DDS1:u1|q[1]~82 at LC_X12_Y20_N1
--operation mode is arithmetic

C1L9_cout_0 = !C1L5 # !C1_q[1];
C1L9 = CARRY(C1L9_cout_0);

--C1L01 is DDS1:u1|q[1]~82COUT1_116 at LC_X12_Y20_N1
--operation mode is arithmetic

C1L01_cout_1 = !C1L6 # !C1_q[1];
C1L01 = CARRY(C1L01_cout_1);


--C1_q[2] is DDS1:u1|q[2] at LC_X12_Y20_N2
--operation mode is arithmetic

C1_q[2]_lut_out = C1_q[2] $ (!C1L9);
C1_q[2] = DFFEAS(C1_q[2]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L21 is DDS1:u1|q[2]~86 at LC_X12_Y20_N2
--operation mode is arithmetic

C1L21_cout_0 = C1_q[2] & (!C1L9);
C1L21 = CARRY(C1L21_cout_0);

--C1L31 is DDS1:u1|q[2]~86COUT1_117 at LC_X12_Y20_N2
--operation mode is arithmetic

C1L31_cout_1 = C1_q[2] & (!C1L01);
C1L31 = CARRY(C1L31_cout_1);


--C1_q[3] is DDS1:u1|q[3] at LC_X12_Y20_N3
--operation mode is arithmetic

C1_q[3]_lut_out = C1_q[3] $ C1L21;
C1_q[3] = DFFEAS(C1_q[3]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L51 is DDS1:u1|q[3]~90 at LC_X12_Y20_N3
--operation mode is arithmetic

C1L51_cout_0 = !C1L21 # !C1_q[3];
C1L51 = CARRY(C1L51_cout_0);

--C1L61 is DDS1:u1|q[3]~90COUT1 at LC_X12_Y20_N3
--operation mode is arithmetic

C1L61_cout_1 = !C1L31 # !C1_q[3];
C1L61 = CARRY(C1L61_cout_1);


--C1_q[4] is DDS1:u1|q[4] at LC_X12_Y20_N4
--operation mode is arithmetic

C1_q[4]_lut_out = C1_q[4] $ !C1L51;
C1_q[4] = DFFEAS(C1_q[4]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L81 is DDS1:u1|q[4]~94 at LC_X12_Y20_N4
--operation mode is arithmetic

C1L81 = C1L91;


--C1_q[5] is DDS1:u1|q[5] at LC_X12_Y20_N5
--operation mode is arithmetic

C1_q[5]_carry_eqn = (!C1L81 & GND) # (C1L81 & VCC);
C1_q[5]_lut_out = C1_q[5] $ C1_q[5]_carry_eqn;
C1_q[5] = DFFEAS(C1_q[5]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L22 is DDS1:u1|q[5]~98 at LC_X12_Y20_N5
--operation mode is arithmetic

C1L22_cout_0 = !C1L81 # !C1_q[5];
C1L22 = CARRY(C1L22_cout_0);

--C1L32 is DDS1:u1|q[5]~98COUT1_118 at LC_X12_Y20_N5
--operation mode is arithmetic

C1L32_cout_1 = !C1L81 # !C1_q[5];
C1L32 = CARRY(C1L32_cout_1);


--C1_q[6] is DDS1:u1|q[6] at LC_X12_Y20_N6
--operation mode is arithmetic

C1_q[6]_carry_eqn = (!C1L81 & C1L22) # (C1L81 & C1L32);
C1_q[6]_lut_out = C1_q[6] $ (!C1_q[6]_carry_eqn);
C1_q[6] = DFFEAS(C1_q[6]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L52 is DDS1:u1|q[6]~102 at LC_X12_Y20_N6
--operation mode is arithmetic

C1L52_cout_0 = C1_q[6] & (!C1L22);
C1L52 = CARRY(C1L52_cout_0);

--C1L62 is DDS1:u1|q[6]~102COUT1_119 at LC_X12_Y20_N6
--operation mode is arithmetic

C1L62_cout_1 = C1_q[6] & (!C1L32);
C1L62 = CARRY(C1L62_cout_1);


--C1_q[7] is DDS1:u1|q[7] at LC_X12_Y20_N7
--operation mode is arithmetic

C1_q[7]_carry_eqn = (!C1L81 & C1L52) # (C1L81 & C1L62);
C1_q[7]_lut_out = C1_q[7] $ (C1_q[7]_carry_eqn);
C1_q[7] = DFFEAS(C1_q[7]_lut_out, GLOBAL(CLK), VCC, , , , , , );

--C1L82 is DDS1:u1|q[7]~106 at LC_X12_Y20_N7
--operation mode is arithmetic

C1L82_cout_0 = !C1L52 # !C1_q[7];
C1L82 = CARRY(C1L82_cout_0);

--C1L92 is DDS1:u1|q[7]~106COUT1_120 at LC_X12_Y20_N7
--operation mode is arithmetic

C1L92_cout_1 = !C1L62 # !C1_q[7];
C1L92 = CARRY(C1L92_cout_1);


--C1_q[8] is DDS1:u1|q[8] at LC_X12_Y20_N8
--operation mode is normal

C1_q[8]_carry_eqn = (!C1L81 & C1L82) # (C1L81 & C1L92);
C1_q[8]_lut_out = C1_q[8] $ !C1_q[8]_carry_eqn;
C1_q[8] = DFFEAS(C1_q[8]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--B1_q is ps7:u0|q at LC_X11_Y25_N2
--operation mode is normal

B1_q_lut_out = !B1_c3;
B1_q = DFFEAS(B1_q_lut_out, !GLOBAL(C1_q[8]), VCC, , , B1L5, GLOBAL(ls), , );


--G2_DOUT[2] is DDS1:u1|REG7B:u5|DOUT[2] at LC_X14_Y20_N2
--operation mode is normal

G2_DOUT[2]_lut_out = GND;
G2_DOUT[2] = DFFEAS(G2_DOUT[2]_lut_out, GLOBAL(CLK), VCC, , , C1_q[1], , , VCC);


--G2_DOUT[3] is DDS1:u1|REG7B:u5|DOUT[3] at LC_X16_Y21_N2
--operation mode is normal

G2_DOUT[3]_lut_out = GND;
G2_DOUT[3] = DFFEAS(G2_DOUT[3]_lut_out, GLOBAL(CLK), VCC, , , C1_q[2], , , VCC);


--G2_DOUT[4] is DDS1:u1|REG7B:u5|DOUT[4] at LC_X13_Y20_N2
--operation mode is normal

G2_DOUT[4]_lut_out = GND;
G2_DOUT[4] = DFFEAS(G2_DOUT[4]_lut_out, GLOBAL(CLK), VCC, , , C1_q[3], , , VCC);


--G2_DOUT[5] is DDS1:u1|REG7B:u5|DOUT[5] at LC_X17_Y20_N2
--operation mode is normal

G2_DOUT[5]_lut_out = GND;
G2_DOUT[5] = DFFEAS(G2_DOUT[5]_lut_out, GLOBAL(CLK), VCC, , , C1_q[4], , , VCC);


--G2_DOUT[6] is DDS1:u1|REG7B:u5|DOUT[6] at LC_X12_Y20_N9
--operation mode is normal

G2_DOUT[6]_lut_out = C1_P7B[6] $ C1_q[5];
G2_DOUT[6] = DFFEAS(G2_DOUT[6]_lut_out, GLOBAL(CLK), VCC, , , , , , );


--D1_xx1 is PL_DPSK2:u2|xx1 at LC_X16_Y20_N8
--operation mode is normal

D1_xx1_lut_out = E1_y;
D1_xx1 = DFFEAS(D1_xx1_lut_out, GLOBAL(CLK), VCC, , !D1L62, , , , );


--D1_xx2 is PL_DPSK2:u2|xx2 at LC_X16_Y20_N5
--operation mode is normal

D1_xx2_lut_out = GND;
D1_xx2 = DFFEAS(D1_xx2_lut_out, GLOBAL(CLK), VCC, , !D1L62, D1_xx1, , , VCC);


--D1_q[1] is PL_DPSK2:u2|q[1] at LC_X15_Y20_N0
--operation mode is arithmetic

D1_q[1]_lut_out = C1_q[0] $ D1_q[1];
D1_q[1] = DFFEAS(D1_q[1]_lut_out, GLOBAL(CLK), VCC, , , D1L62, , , D1L42);

--D1L3 is PL_DPSK2:u2|q[1]~221 at LC_X15_Y20_N0
--operation mode is arithmetic

D1L3_cout_0 = C1_q[0] & D1_q[1];
D1L3 = CARRY(D1L3_cout_0);

--D1L4 is PL_DPSK2:u2|q[1]~221COUT1_254 at LC_X15_Y20_N0
--operation mode is arithmetic

D1L4_cout_1 = C1_q[0] & D1_q[1];
D1L4 = CARRY(D1L4_cout_1);


--D1_q[2] is PL_DPSK2:u2|q[2] at LC_X15_Y20_N1
--operation mode is arithmetic

D1_q[2]_lut_out = D1_q[2] $ (D1L3);
D1_q[2] = DFFEAS(D1_q[2]_lut_out, GLOBAL(CLK), VCC, , , ~GND, , , D1L42);

--D1L6 is PL_DPSK2:u2|q[2]~225 at LC_X15_Y20_N1
--operation mode is arithmetic

D1L6_cout_0 = !D1L3 # !D1_q[2];
D1L6 = CARRY(D1L6_cout_0);

--D1L7 is PL_DPSK2:u2|q[2]~225COUT1_255 at LC_X15_Y20_N1
--operation mode is arithmetic

D1L7_cout_1 = !D1L4 # !D1_q[2];
D1L7 = CARRY(D1L7_cout_1);