<hr>

<h3>Quartus II Log File</h3>
<TABLE 
<TR>
	  <TD> <b>Top level Design </b> </TD> <TD>Sinout</TD>
</TR>
<TR>
	  <TD> <b>Working Directory </b> </TD> <TD>D:\simulink</TD>
</TR>
<TR>
	  <TD> <b>Executable Path </b> </TD> <TD>"C:\altera\quartus60\bin\quartus_cmd" -f "D:\simulink\Sinout_quartus.tcl"</TD>
</TR>
<TR>
	  <TD> <b>Date </b> </TD> <TD>Monday, March 24, 2008</TD>
</TR>
<TR>
	  <TD> <b>Time </b> </TD> <TD>11:47:16</TD>
</TR>
<TR>
	  <TD><b>Version </b> </TD> <TD> 2.1.3 Build 31</TD>
</TR>
</TABLE><br>
<hr>
<hr>

DSP Builder <br>Quartus II development tool and MATLAB/Simulink Interface
<br>Version 2.1.3 Build 31<br>$Revision: 1.25 $<p>Copyright &copy; 2001-2003 Altera Corporation. All rights reserved.</p>

<p>The DSP Builder software, including, without limitation, the clock-cycle limited 
versions of the MegaCore&reg; Logic Functions included therein, may only be used to 
develop designs for programmable logic devices manufactured by Altera Corporation 
and sold by Altera Corporation and its authorized distributors. IN NO EVENT MAY 
SUCH SOFTWARE AND FUNCTIONS BE USED TO PROGRAM ANY PROGRAMMABLE LOGIC DEVICES, FIELD
PROGRAMMABLE GATE ARRAYS, ASICS, STANDARD PRODUCTS, OR ANY OTHER SEMICONDUCTOR 
DEVICE MANUFACTURED BY ANY COMPANY OR ENTITY OTHER THAN ALTERA.  For the complete 
terms and conditions applicable to your use of the software and functions, please 
refer to the Altera Program License.</p>