?? proj.tan.qmsg
字號:
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "23 " "Warning: Found 23 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[2\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[2\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[2\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[15\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[15\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[15\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[0\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[0\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[0\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[1\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[1\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[1\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[5\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[5\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[5\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[6\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[6\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[6\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[3\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[3\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[3\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[4\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[4\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[4\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[9\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[9\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[9\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[10\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[10\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[10\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[7\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[7\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[7\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[8\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[8\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[8\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[14\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[14\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[14\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[11\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[11\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[11\]" } } } } } 0} { "Info" "ITAN_GATED_CLK" "lcd:inst\|reduce_nor~374 " "Info: Detected gated clock \"lcd:inst\|reduce_nor~374\" as buffer" { } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|reduce_nor~374" } } } } } 0} { "Info" "ITAN_GATED_CLK" "lcd:inst\|reduce_nor~371 " "Info: Detected gated clock \"lcd:inst\|reduce_nor~371\" as buffer" { } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|reduce_nor~371" } } } } } 0} { "Info" "ITAN_GATED_CLK" "lcd:inst\|reduce_nor~372 " "Info: Detected gated clock \"lcd:inst\|reduce_nor~372\" as buffer" { } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|reduce_nor~372" } } } } } 0} { "Info" "ITAN_GATED_CLK" "lcd:inst\|reduce_nor~373 " "Info: Detected gated clock \"lcd:inst\|reduce_nor~373\" as buffer" { } { { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|reduce_nor~373" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[12\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[12\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[12\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "div16:inst1\|count\[3\] " "Info: Detected ripple clock \"div16:inst1\|count\[3\]\" as buffer" { } { { "../src/div16.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/div16.v" 5 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "div16:inst1\|count\[3\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkcnt\[13\] " "Info: Detected ripple clock \"lcd:inst\|clkcnt\[13\]\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkcnt\[13\]" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clkdiv " "Info: Detected ripple clock \"lcd:inst\|clkdiv\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 76 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clkdiv" } } } } } 0} { "Info" "ITAN_RIPPLE_CLK" "lcd:inst\|clk_int " "Info: Detected ripple clock \"lcd:inst\|clk_int\" as buffer" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 72 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "lcd:inst\|clk_int" } } } } } 0} } { } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register lcd:inst\|counter\[1\] register lcd:inst\|state\[9\] 104.54 MHz 9.566 ns Internal " "Info: Clock \"clk\" has Internal fmax of 104.54 MHz between source register \"lcd:inst\|counter\[1\]\" and destination register \"lcd:inst\|state\[9\]\" (period= 9.566 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.195 ns + Longest register register " "Info: + Longest register to register delay is 7.195 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lcd:inst\|counter\[1\] 1 REG LC_X49_Y17_N2 13 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X49_Y17_N2; Fanout = 13; REG Node = 'lcd:inst\|counter\[1\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "" { lcd:inst|counter[1] } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 58 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.319 ns) + CELL(0.590 ns) 1.909 ns lcd:inst\|char_addr~1495 2 COMB LC_X49_Y18_N5 4 " "Info: 2: + IC(1.319 ns) + CELL(0.590 ns) = 1.909 ns; Loc. = LC_X49_Y18_N5; Fanout = 4; COMB Node = 'lcd:inst\|char_addr~1495'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.909 ns" { lcd:inst|counter[1] lcd:inst|char_addr~1495 } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 63 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.160 ns) + CELL(0.590 ns) 3.659 ns lcd:inst\|LessThan~391 3 COMB LC_X49_Y17_N8 3 " "Info: 3: + IC(1.160 ns) + CELL(0.590 ns) = 3.659 ns; Loc. = LC_X49_Y17_N8; Fanout = 3; COMB Node = 'lcd:inst\|LessThan~391'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.750 ns" { lcd:inst|char_addr~1495 lcd:inst|LessThan~391 } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.209 ns) + CELL(0.442 ns) 5.310 ns lcd:inst\|char_addr~1496 4 COMB LC_X50_Y18_N3 3 " "Info: 4: + IC(1.209 ns) + CELL(0.442 ns) = 5.310 ns; Loc. = LC_X50_Y18_N3; Fanout = 3; COMB Node = 'lcd:inst\|char_addr~1496'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.651 ns" { lcd:inst|LessThan~391 lcd:inst|char_addr~1496 } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 63 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.147 ns) + CELL(0.738 ns) 7.195 ns lcd:inst\|state\[9\] 5 REG LC_X50_Y17_N7 5 " "Info: 5: + IC(1.147 ns) + CELL(0.738 ns) = 7.195 ns; Loc. = LC_X50_Y17_N7; Fanout = 5; REG Node = 'lcd:inst\|state\[9\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.885 ns" { lcd:inst|char_addr~1496 lcd:inst|state[9] } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 57 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.360 ns 32.80 % " "Info: Total cell delay = 2.360 ns ( 32.80 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.835 ns 67.20 % " "Info: Total interconnect delay = 4.835 ns ( 67.20 % )" { } { } 0} } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "7.195 ns" { lcd:inst|counter[1] lcd:inst|char_addr~1495 lcd:inst|LessThan~391 lcd:inst|char_addr~1496 lcd:inst|state[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.195 ns" { lcd:inst|counter[1] lcd:inst|char_addr~1495 lcd:inst|LessThan~391 lcd:inst|char_addr~1496 lcd:inst|state[9] } { 0.000ns 1.319ns 1.160ns 1.209ns 1.147ns } { 0.000ns 0.590ns 0.590ns 0.442ns 0.738ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-2.110 ns - Smallest " "Info: - Smallest clock skew is -2.110 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 20.037 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 20.037 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 4 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 4; CLK Node = 'clk'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "" { clk } "NODE_NAME" } "" } } { "lcd_test.bdf" "" { Schematic "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/lcd_test.bdf" { { 88 232 400 104 "clk" "" } } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.935 ns) 3.434 ns div16:inst1\|count\[3\] 2 REG LC_X8_Y13_N4 17 " "Info: 2: + IC(1.030 ns) + CELL(0.935 ns) = 3.434 ns; Loc. = LC_X8_Y13_N4; Fanout = 17; REG Node = 'div16:inst1\|count\[3\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.965 ns" { clk div16:inst1|count[3] } "NODE_NAME" } "" } } { "../src/div16.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/div16.v" 5 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.573 ns) + CELL(0.935 ns) 7.942 ns lcd:inst\|clkcnt\[2\] 3 REG LC_X9_Y12_N6 3 " "Info: 3: + IC(3.573 ns) + CELL(0.935 ns) = 7.942 ns; Loc. = LC_X9_Y12_N6; Fanout = 3; REG Node = 'lcd:inst\|clkcnt\[2\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "4.508 ns" { div16:inst1|count[3] lcd:inst|clkcnt[2] } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.378 ns) 8.320 ns lcd:inst\|reduce_nor~374 4 COMB LC_X9_Y12_N6 1 " "Info: 4: + IC(0.000 ns) + CELL(0.378 ns) = 8.320 ns; Loc. = LC_X9_Y12_N6; Fanout = 1; COMB Node = 'lcd:inst\|reduce_nor~374'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "0.378 ns" { lcd:inst|clkcnt[2] lcd:inst|reduce_nor~374 } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 8.616 ns lcd:inst\|reduce_nor~375 5 COMB LC_X9_Y12_N7 7 " "Info: 5: + IC(0.182 ns) + CELL(0.114 ns) = 8.616 ns; Loc. = LC_X9_Y12_N7; Fanout = 7; COMB Node = 'lcd:inst\|reduce_nor~375'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "0.296 ns" { lcd:inst|reduce_nor~374 lcd:inst|reduce_nor~375 } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.762 ns) + CELL(0.935 ns) 10.313 ns lcd:inst\|clkdiv 6 REG LC_X8_Y12_N0 3 " "Info: 6: + IC(0.762 ns) + CELL(0.935 ns) = 10.313 ns; Loc. = LC_X8_Y12_N0; Fanout = 3; REG Node = 'lcd:inst\|clkdiv'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.697 ns" { lcd:inst|reduce_nor~375 lcd:inst|clkdiv } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 76 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.125 ns) + CELL(0.935 ns) 15.373 ns lcd:inst\|clk_int 7 REG LC_X10_Y13_N2 20 " "Info: 7: + IC(4.125 ns) + CELL(0.935 ns) = 15.373 ns; Loc. = LC_X10_Y13_N2; Fanout = 20; REG Node = 'lcd:inst\|clk_int'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "5.060 ns" { lcd:inst|clkdiv lcd:inst|clk_int } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 72 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.953 ns) + CELL(0.711 ns) 20.037 ns lcd:inst\|state\[9\] 8 REG LC_X50_Y17_N7 5 " "Info: 8: + IC(3.953 ns) + CELL(0.711 ns) = 20.037 ns; Loc. = LC_X50_Y17_N7; Fanout = 5; REG Node = 'lcd:inst\|state\[9\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "4.664 ns" { lcd:inst|clk_int lcd:inst|state[9] } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 57 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.412 ns 32.00 % " "Info: Total cell delay = 6.412 ns ( 32.00 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "13.625 ns 68.00 % " "Info: Total interconnect delay = 13.625 ns ( 68.00 % )" { } { } 0} } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "20.037 ns" { clk div16:inst1|count[3] lcd:inst|clkcnt[2] lcd:inst|reduce_nor~374 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|state[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "20.037 ns" { clk clk~out0 div16:inst1|count[3] lcd:inst|clkcnt[2] lcd:inst|reduce_nor~374 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|state[9] } { 0.000ns 0.000ns 1.030ns 3.573ns 0.000ns 0.182ns 0.762ns 4.125ns 3.953ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.378ns 0.114ns 0.935ns 0.935ns 0.711ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 22.147 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 22.147 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_153 4 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_153; Fanout = 4; CLK Node = 'clk'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "" { clk } "NODE_NAME" } "" } } { "lcd_test.bdf" "" { Schematic "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/lcd_test.bdf" { { 88 232 400 104 "clk" "" } } } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.935 ns) 3.434 ns div16:inst1\|count\[3\] 2 REG LC_X8_Y13_N4 17 " "Info: 2: + IC(1.030 ns) + CELL(0.935 ns) = 3.434 ns; Loc. = LC_X8_Y13_N4; Fanout = 17; REG Node = 'div16:inst1\|count\[3\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.965 ns" { clk div16:inst1|count[3] } "NODE_NAME" } "" } } { "../src/div16.v" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/div16.v" 5 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.608 ns) + CELL(0.935 ns) 7.977 ns lcd:inst\|clkcnt\[7\] 3 REG LC_X9_Y13_N2 3 " "Info: 3: + IC(3.608 ns) + CELL(0.935 ns) = 7.977 ns; Loc. = LC_X9_Y13_N2; Fanout = 3; REG Node = 'lcd:inst\|clkcnt\[7\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "4.543 ns" { div16:inst1|count[3] lcd:inst|clkcnt[7] } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 74 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.304 ns) + CELL(0.590 ns) 9.871 ns lcd:inst\|reduce_nor~372 4 COMB LC_X9_Y12_N5 1 " "Info: 4: + IC(1.304 ns) + CELL(0.590 ns) = 9.871 ns; Loc. = LC_X9_Y12_N5; Fanout = 1; COMB Node = 'lcd:inst\|reduce_nor~372'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.894 ns" { lcd:inst|clkcnt[7] lcd:inst|reduce_nor~372 } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.413 ns) + CELL(0.442 ns) 10.726 ns lcd:inst\|reduce_nor~375 5 COMB LC_X9_Y12_N7 7 " "Info: 5: + IC(0.413 ns) + CELL(0.442 ns) = 10.726 ns; Loc. = LC_X9_Y12_N7; Fanout = 7; COMB Node = 'lcd:inst\|reduce_nor~375'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "0.855 ns" { lcd:inst|reduce_nor~372 lcd:inst|reduce_nor~375 } "NODE_NAME" } "" } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.762 ns) + CELL(0.935 ns) 12.423 ns lcd:inst\|clkdiv 6 REG LC_X8_Y12_N0 3 " "Info: 6: + IC(0.762 ns) + CELL(0.935 ns) = 12.423 ns; Loc. = LC_X8_Y12_N0; Fanout = 3; REG Node = 'lcd:inst\|clkdiv'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "1.697 ns" { lcd:inst|reduce_nor~375 lcd:inst|clkdiv } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 76 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.125 ns) + CELL(0.935 ns) 17.483 ns lcd:inst\|clk_int 7 REG LC_X10_Y13_N2 20 " "Info: 7: + IC(4.125 ns) + CELL(0.935 ns) = 17.483 ns; Loc. = LC_X10_Y13_N2; Fanout = 20; REG Node = 'lcd:inst\|clk_int'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "5.060 ns" { lcd:inst|clkdiv lcd:inst|clk_int } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 72 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.953 ns) + CELL(0.711 ns) 22.147 ns lcd:inst\|counter\[1\] 8 REG LC_X49_Y17_N2 13 " "Info: 8: + IC(3.953 ns) + CELL(0.711 ns) = 22.147 ns; Loc. = LC_X49_Y17_N2; Fanout = 13; REG Node = 'lcd:inst\|counter\[1\]'" { } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "4.664 ns" { lcd:inst|clk_int lcd:inst|counter[1] } "NODE_NAME" } "" } } { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 58 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.952 ns 31.39 % " "Info: Total cell delay = 6.952 ns ( 31.39 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "15.195 ns 68.61 % " "Info: Total interconnect delay = 15.195 ns ( 68.61 % )" { } { } 0} } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "22.147 ns" { clk div16:inst1|count[3] lcd:inst|clkcnt[7] lcd:inst|reduce_nor~372 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|counter[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "22.147 ns" { clk clk~out0 div16:inst1|count[3] lcd:inst|clkcnt[7] lcd:inst|reduce_nor~372 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|counter[1] } { 0.000ns 0.000ns 1.030ns 3.608ns 1.304ns 0.413ns 0.762ns 4.125ns 3.953ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.590ns 0.442ns 0.935ns 0.935ns 0.711ns } } } } 0} } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "20.037 ns" { clk div16:inst1|count[3] lcd:inst|clkcnt[2] lcd:inst|reduce_nor~374 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|state[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "20.037 ns" { clk clk~out0 div16:inst1|count[3] lcd:inst|clkcnt[2] lcd:inst|reduce_nor~374 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|state[9] } { 0.000ns 0.000ns 1.030ns 3.573ns 0.000ns 0.182ns 0.762ns 4.125ns 3.953ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.378ns 0.114ns 0.935ns 0.935ns 0.711ns } } } { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "22.147 ns" { clk div16:inst1|count[3] lcd:inst|clkcnt[7] lcd:inst|reduce_nor~372 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|counter[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "22.147 ns" { clk clk~out0 div16:inst1|count[3] lcd:inst|clkcnt[7] lcd:inst|reduce_nor~372 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|counter[1] } { 0.000ns 0.000ns 1.030ns 3.608ns 1.304ns 0.413ns 0.762ns 4.125ns 3.953ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.590ns 0.442ns 0.935ns 0.935ns 0.711ns } } } } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 58 -1 0 } } } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" { } { { "../src/lcd.vhd" "" { Text "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/src/lcd.vhd" 57 -1 0 } } } 0} } { { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "7.195 ns" { lcd:inst|counter[1] lcd:inst|char_addr~1495 lcd:inst|LessThan~391 lcd:inst|char_addr~1496 lcd:inst|state[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.195 ns" { lcd:inst|counter[1] lcd:inst|char_addr~1495 lcd:inst|LessThan~391 lcd:inst|char_addr~1496 lcd:inst|state[9] } { 0.000ns 1.319ns 1.160ns 1.209ns 1.147ns } { 0.000ns 0.590ns 0.590ns 0.442ns 0.738ns } } } { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "20.037 ns" { clk div16:inst1|count[3] lcd:inst|clkcnt[2] lcd:inst|reduce_nor~374 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|state[9] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "20.037 ns" { clk clk~out0 div16:inst1|count[3] lcd:inst|clkcnt[2] lcd:inst|reduce_nor~374 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|state[9] } { 0.000ns 0.000ns 1.030ns 3.573ns 0.000ns 0.182ns 0.762ns 4.125ns 3.953ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.378ns 0.114ns 0.935ns 0.935ns 0.711ns } } } { "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" "" { Report "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/Proj_cmp.qrpt" Compiler "Proj" "UNKNOWN" "V1" "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/db/LCD_Test.quartus_db" { Floorplan "E:/HSNISO V3.2/HSNISO V3.2/EP1C12/LCD1602/Proj/" "" "22.147 ns" { clk div16:inst1|count[3] lcd:inst|clkcnt[7] lcd:inst|reduce_nor~372 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|counter[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "22.147 ns" { clk clk~out0 div16:inst1|count[3] lcd:inst|clkcnt[7] lcd:inst|reduce_nor~372 lcd:inst|reduce_nor~375 lcd:inst|clkdiv lcd:inst|clk_int lcd:inst|counter[1] } { 0.000ns 0.000ns 1.030ns 3.608ns 1.304ns 0.413ns 0.762ns 4.125ns 3.953ns } { 0.000ns 1.469ns 0.935ns 0.935ns 0.590ns 0.442ns 0.935ns 0.935ns 0.711ns } } } } 0}
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