/* * Copyright (c) 2001-2004 by David Brownell * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers *  * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software Foundation, * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *//* this file is part of ehci-hcd.c *//*-------------------------------------------------------------------------*//* * EHCI scheduled transaction support:  interrupt, iso, split iso * These are called "periodic" transactions in the EHCI spec. * * Note that for interrupt transfers, the QH/QTD manipulation is shared * with the "asynchronous" transaction support (control/bulk transfers). * The only real difference is in how interrupt transfers are scheduled. * * For ISO, we make an "iso_stream" head to serve the same role as a QH. * It keeps track of every ITD (or SITD) that's linked, and holds enough * pre-calculated schedule data to make appending to the queue be quick. */static int ehci_get_frame (struct usb_hcd *hcd);/*-------------------------------------------------------------------------*//* * periodic_next_shadow - return "next" pointer on shadow list * @periodic: host pointer to qh/itd/sitd * @tag: hardware tag for type of this record */static union ehci_shadow *periodic_next_shadow (union ehci_shadow *periodic, __le32 tag){	switch (tag) {	case Q_TYPE_QH:		return &periodic->qh->qh_next;	case Q_TYPE_FSTN:		return &periodic->fstn->fstn_next;	case Q_TYPE_ITD:		return &periodic->itd->itd_next;	// case Q_TYPE_SITD:	default:		return &periodic->sitd->sitd_next;	}}/* caller must hold ehci->lock */static void periodic_unlink (struct ehci_hcd *ehci, unsigned frame, void *ptr){	union ehci_shadow	*prev_p = &ehci->pshadow [frame];	__le32			*hw_p = &ehci->periodic [frame];	union ehci_shadow	here = *prev_p;	/* find predecessor of "ptr"; hw and shadow lists are in sync */	while (here.ptr && here.ptr != ptr) {		prev_p = periodic_next_shadow (prev_p, Q_NEXT_TYPE (*hw_p));		hw_p = here.hw_next;		here = *prev_p;	}	/* an interrupt entry (at list end) could have been shared */	if (!here.ptr)		return;	/* update shadow and hardware lists ... the old "next" pointers	 * from ptr may still be in use, the caller updates them.	 */	*prev_p = *periodic_next_shadow (&here, Q_NEXT_TYPE (*hw_p));	*hw_p = *here.hw_next;}/* how many of the uframe's 125 usecs are allocated? */static unsigned shortperiodic_usecs (struct ehci_hcd *ehci, unsigned frame, unsigned uframe){	__le32			*hw_p = &ehci->periodic [frame];	union ehci_shadow	*q = &ehci->pshadow [frame];	unsigned		usecs = 0;	while (q->ptr) {		switch (Q_NEXT_TYPE (*hw_p)) {		case Q_TYPE_QH:			/* is it in the S-mask? */			if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe))				usecs += q->qh->usecs;			/* ... or C-mask? */			if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe)))				usecs += q->qh->c_usecs;			hw_p = &q->qh->hw_next;			q = &q->qh->qh_next;			break;		// case Q_TYPE_FSTN:		default:			/* for "save place" FSTNs, count the relevant INTR			 * bandwidth from the previous frame			 */			if (q->fstn->hw_prev != EHCI_LIST_END) {				ehci_dbg (ehci, "ignoring FSTN cost ...\n");			}			hw_p = &q->fstn->hw_next;			q = &q->fstn->fstn_next;			break;		case Q_TYPE_ITD:			usecs += q->itd->usecs [uframe];			hw_p = &q->itd->hw_next;			q = &q->itd->itd_next;			break;		case Q_TYPE_SITD:			/* is it in the S-mask?  (count SPLIT, DATA) */			if (q->sitd->hw_uframe & cpu_to_le32 (1 << uframe)) {				if (q->sitd->hw_fullspeed_ep &						__constant_cpu_to_le32 (1<<31))					usecs += q->sitd->stream->usecs;				else	/* worst case for OUT start-split */					usecs += HS_USECS_ISO (188);			}			/* ... C-mask?  (count CSPLIT, DATA) */			if (q->sitd->hw_uframe &					cpu_to_le32 (1 << (8 + uframe))) {				/* worst case for IN complete-split */				usecs += q->sitd->stream->c_usecs;			}			hw_p = &q->sitd->hw_next;			q = &q->sitd->sitd_next;			break;		}	}#ifdef	DEBUG	if (usecs > 100)		ehci_err (ehci, "uframe %d sched overrun: %d usecs\n",			frame * 8 + uframe, usecs);#endif	return usecs;}/*-------------------------------------------------------------------------*/static int same_tt (struct rtdm_usb_device *dev1, struct rtdm_usb_device *dev2){	if (!dev1->tt || !dev2->tt)		return 0;	if (dev1->tt != dev2->tt)		return 0;	if (dev1->tt->multi)		return dev1->ttport == dev2->ttport;	else		return 1;}/* return true iff the device's transaction translator is available * for a periodic transfer starting at the specified frame, using * all the uframes in the mask. */static int tt_no_collision (	struct ehci_hcd		*ehci,	unsigned		period,	struct rtdm_usb_device	*dev,	unsigned		frame,	u32			uf_mask){	if (period == 0)	/* error */		return 0;	/* note bandwidth wastage:  split never follows csplit	 * (different dev or endpoint) until the next uframe.	 * calling convention doesn't make that distinction.	 */	for (; frame < ehci->periodic_size; frame += period) {		union ehci_shadow	here;		__le32			type;		here = ehci->pshadow [frame];		type = Q_NEXT_TYPE (ehci->periodic [frame]);		while (here.ptr) {			switch (type) {			case Q_TYPE_ITD:				type = Q_NEXT_TYPE (here.itd->hw_next);				here = here.itd->itd_next;				continue;			case Q_TYPE_QH:				if (same_tt (dev, here.qh->dev)) {					u32		mask;					mask = le32_to_cpu (here.qh->hw_info2);					/* "knows" no gap is needed */					mask |= mask >> 8;					if (mask & uf_mask)						break;				}				type = Q_NEXT_TYPE (here.qh->hw_next);				here = here.qh->qh_next;				continue;			case Q_TYPE_SITD:				if (same_tt (dev, here.sitd->urb->dev)) {					u16		mask;					mask = le32_to_cpu (here.sitd								->hw_uframe);					/* FIXME assumes no gap for IN! */					mask |= mask >> 8;					if (mask & uf_mask)						break;				}				type = Q_NEXT_TYPE (here.sitd->hw_next);				here = here.sitd->sitd_next;				continue;			// case Q_TYPE_FSTN:			default:				ehci_dbg(ehci,					"periodic frame %d bogus type %d\n",					frame, type);			}			/* collision or error */			return 0;		}	}	/* no collision */	return 1;}/*-------------------------------------------------------------------------*/static int enable_periodic (struct ehci_hcd *ehci){	u32	cmd;	int	status;	/* did clearing PSE did take effect yet?	 * takes effect only at frame boundaries...	 */	status = handshake (&ehci->regs->status, STS_PSS, 0, 9 * 125);	if (status != 0) {		ehci_to_hcd(ehci)->state = HC_STATE_HALT;		return status;	}	cmd = readl (&ehci->regs->command) | CMD_PSE;	writel (cmd, &ehci->regs->command);	/* posted write ... PSS happens later */	ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;	/* make sure ehci_work scans these */	ehci->next_uframe = readl (&ehci->regs->frame_index)				% (ehci->periodic_size << 3);	return 0;}static int disable_periodic (struct ehci_hcd *ehci){	u32	cmd;	int	status;	/* did setting PSE not take effect yet?	 * takes effect only at frame boundaries...	 */	status = handshake (&ehci->regs->status, STS_PSS, STS_PSS, 9 * 125);	if (status != 0) {		ehci_to_hcd(ehci)->state = HC_STATE_HALT;		return status;	}	cmd = readl (&ehci->regs->command) & ~CMD_PSE;	writel (cmd, &ehci->regs->command);	/* posted write ... */	ehci->next_uframe = -1;	return 0;}/*-------------------------------------------------------------------------*//* periodic schedule slots have iso tds (normal or split) first, then a * sparse tree for active interrupt transfers. * * this just links in a qh; caller guarantees uframe masks are set right. * no FSTN support (yet; ehci 0.96+) */static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh){	unsigned	i;	unsigned	period = qh->period;	rtdm_dev_dbg(&qh->dev->dev,		"link qh%d-%04x/%p start %d [%d/%d us]\n",		period, le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK),		qh, qh->start, qh->usecs, qh->c_usecs);	/* high bandwidth, or otherwise every microframe */	if (period == 0)		period = 1;	for (i = qh->start; i < ehci->periodic_size; i += period) {		union ehci_shadow	*prev = &ehci->pshadow [i];		__le32			*hw_p = &ehci->periodic [i];		union ehci_shadow	here = *prev;		__le32			type = 0;		/* skip the iso nodes at list head */		while (here.ptr) {			type = Q_NEXT_TYPE (*hw_p);			if (type == Q_TYPE_QH)				break;			prev = periodic_next_shadow (prev, type);			hw_p = &here.qh->hw_next;			here = *prev;		}		/* sorting each branch by period (slow-->fast)		 * enables sharing interior tree nodes		 */		while (here.ptr && qh != here.qh) {			if (qh->period > here.qh->period)				break;			prev = &here.qh->qh_next;			hw_p = &here.qh->hw_next;			here = *prev;		}		/* link in this qh, unless some earlier pass did that */		if (qh != here.qh) {			qh->qh_next = here;			if (here.qh)				qh->hw_next = *hw_p;			wmb ();			prev->qh = qh;			*hw_p = QH_NEXT (qh->qh_dma);		}	}	qh->qh_state = QH_STATE_LINKED;	qh_get (qh);	/* update per-qh bandwidth for usbfs */	ehci_to_hcd(ehci)->self.bandwidth_allocated += qh->period		? ((qh->usecs + qh->c_usecs) / qh->period)		: (qh->usecs * 8);	/* maybe enable periodic schedule processing */	if (!ehci->periodic_sched++)		return enable_periodic (ehci);	return 0;}static void qh_unlink_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh){	unsigned	i;	unsigned	period;	// FIXME:	// IF this isn't high speed	//   and this qh is active in the current uframe	//   (and overlay token SplitXstate is false?)	// THEN	//   qh->hw_info1 |= __constant_cpu_to_le32 (1 << 7 /* "ignore" */);	/* high bandwidth, or otherwise part of every microframe */	if ((period = qh->period) == 0)		period = 1;	for (i = qh->start; i < ehci->periodic_size; i += period)		periodic_unlink (ehci, i, qh);	/* update per-qh bandwidth for usbfs */	ehci_to_hcd(ehci)->self.bandwidth_allocated -= qh->period		? ((qh->usecs + qh->c_usecs) / qh->period)		: (qh->usecs * 8);	rtdm_dev_dbg(&qh->dev->dev,		"unlink qh%d-%04x/%p start %d [%d/%d us]\n",		qh->period,		le32_to_cpup (&qh->hw_info2) & (QH_CMASK | QH_SMASK),		qh, qh->start, qh->usecs, qh->c_usecs);	/* qh->qh_next still "live" to HC */	qh->qh_state = QH_STATE_UNLINK;	qh->qh_next.ptr = NULL;	qh_put (qh);	/* maybe turn off periodic schedule */	ehci->periodic_sched--;	if (!ehci->periodic_sched)		(void) disable_periodic (ehci);}static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh){	unsigned	wait;	qh_unlink_periodic (ehci, qh);	/* simple/paranoid:  always delay, expecting the HC needs to read	 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and	 * expect khubd to clean up after any CSPLITs we won't issue.	 * active high speed queues may need bigger delays...	 */	if (list_empty (&qh->qtd_list)			|| (__constant_cpu_to_le32 (QH_CMASK)					& qh->hw_info2) != 0)		wait = 2;	else		wait = 55;	/* worst case: 3 * 1024 */	udelay (wait);	qh->qh_state = QH_STATE_IDLE;	qh->hw_next = EHCI_LIST_END;	wmb ();}/*-------------------------------------------------------------------------*/static int check_period (	struct ehci_hcd *ehci, 	unsigned	frame,	unsigned	uframe,	unsigned	period,	unsigned	usecs) {	int		claimed;	/* complete split running into next frame?	 * given FSTN support, we could sometimes check...	 */	if (uframe >= 8)		return 0;	/*	 * 80% periodic == 100 usec/uframe available	 * convert "usecs we need" to "max already claimed" 	 */	usecs = 100 - usecs;	/* we "know" 2 and 4 uframe intervals were rejected; so	 * for period 0, check _every_ microframe in the schedule.	 */	if (unlikely (period == 0)) {		do {			for (uframe = 0; uframe < 7; uframe++) {				claimed = periodic_usecs (ehci, frame, uframe);				if (claimed > usecs)					return 0;			}		} while ((frame += 1) < ehci->periodic_size);	/* just check the specified uframe, at that period */	} else {		do {			claimed = periodic_usecs (ehci, frame, uframe);			if (claimed > usecs)				return 0;		} while ((frame += period) < ehci->periodic_size);	}	// success!	return 1;}static int check_intr_schedule (	struct ehci_hcd		*ehci, 	unsigned		frame,	unsigned		uframe,	const struct ehci_qh	*qh,	__le32			*c_maskp){    	int		retval = -ENOSPC;	u8		mask;	if (qh->c_usecs && uframe >= 6)		/* FSTN territory? */		goto done;	if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))		goto done;	if (!qh->c_usecs) {		retval = 0;		*c_maskp = 0;		goto done;	}	/* Make sure this tt's buffer is also available for CSPLITs.	 * We pessimize a bit; probably the typical full speed case	 * doesn't need the second CSPLIT.	 * 	 * NOTE:  both SPLIT and CSPLIT could be checked in just	 * one smart pass...	 */	mask = 0x03 << (uframe + qh->gap_uf);	*c_maskp = cpu_to_le32 (mask << 8);	mask |= 1 << uframe;	if (tt_no_collision (ehci, qh->period, qh->dev, frame, mask)) {		if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,