?? alu.map.eqn
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--A1L851Q is C~reg0
--operation mode is normal
A1L851Q_lut_out = A1L862 & (A1L962 & c_tmp # !A1L962 & (result_t[16])) # !A1L862 & c_tmp;
A1L851Q = DFFEAS(A1L851Q_lut_out, clk, reset, , , , , , );
--A1L523Q is Z~reg0
--operation mode is normal
A1L523Q_lut_out = OP[2] & (OP[3] & z1_tmp # !OP[3] & (A1L423)) # !OP[2] & (A1L423);
A1L523Q = DFFEAS(A1L523Q_lut_out, clk, reset, , A1L862, , , , );
--result_t[0] is result_t[0]
--operation mode is normal
result_t[0]_lut_out = OP[3] & A1L871 # !OP[3] & (A1L262);
result_t[0] = DFFEAS(result_t[0]_lut_out, clk, reset, , !write, , , , );
--result_t[1] is result_t[1]
--operation mode is normal
result_t[1]_lut_out = A1L192 & (A1L381 & (A[2]) # !A1L381 & A1L72) # !A1L192 & (A1L381);
result_t[1] = DFFEAS(result_t[1]_lut_out, clk, reset, , !write, , , , );
--result_t[2] is result_t[2]
--operation mode is normal
result_t[2]_lut_out = A1L692 & (A1L881 & (A1L73) # !A1L881 & A[1]) # !A1L692 & (A1L881);
result_t[2] = DFFEAS(result_t[2]_lut_out, clk, reset, , !write, , , , );
--result_t[3] is result_t[3]
--operation mode is normal
result_t[3]_lut_out = A1L292 & (A1L291 & (A[4]) # !A1L291 & A1L981) # !A1L292 & (A1L291);
result_t[3] = DFFEAS(result_t[3]_lut_out, clk, reset, , !write, , , , );
--result_t[4] is result_t[4]
--operation mode is normal
result_t[4]_lut_out = A1L492 & (A1L891) # !A1L492 & (A1L891 & (A1L94) # !A1L891 & A1L791);
result_t[4] = DFFEAS(result_t[4]_lut_out, clk, reset, , !write, , , , );
--result_t[5] is result_t[5]
--operation mode is normal
result_t[5]_lut_out = A1L192 & (A1L202 & (A[6]) # !A1L202 & A1L15) # !A1L192 & (A1L202);
result_t[5] = DFFEAS(result_t[5]_lut_out, clk, reset, , !write, , , , );
--result_t[6] is result_t[6]
--operation mode is normal
result_t[6]_lut_out = A1L692 & (A1L602 & (A1L16) # !A1L602 & A[5]) # !A1L692 & (A1L602);
result_t[6] = DFFEAS(result_t[6]_lut_out, clk, reset, , !write, , , , );
--result_t[7] is result_t[7]
--operation mode is normal
result_t[7]_lut_out = A1L292 & (A1L012 & (A[8]) # !A1L012 & A1L702) # !A1L292 & (A1L012);
result_t[7] = DFFEAS(result_t[7]_lut_out, clk, reset, , !write, , , , );
--result_t[8] is result_t[8]
--operation mode is normal
result_t[8]_lut_out = A1L492 & (A1L612) # !A1L492 & (A1L612 & (A1L37) # !A1L612 & A1L512);
result_t[8] = DFFEAS(result_t[8]_lut_out, clk, reset, , !write, , , , );
--result_t[9] is result_t[9]
--operation mode is normal
result_t[9]_lut_out = A1L192 & (A1L022 & (A[10]) # !A1L022 & A1L57) # !A1L192 & (A1L022);
result_t[9] = DFFEAS(result_t[9]_lut_out, clk, reset, , !write, , , , );
--result_t[10] is result_t[10]
--operation mode is normal
result_t[10]_lut_out = A1L692 & (A1L422 & (A1L58) # !A1L422 & A[9]) # !A1L692 & (A1L422);
result_t[10] = DFFEAS(result_t[10]_lut_out, clk, reset, , !write, , , , );
--result_t[11] is result_t[11]
--operation mode is normal
result_t[11]_lut_out = A1L292 & (A1L822 & (A[12]) # !A1L822 & A1L522) # !A1L292 & (A1L822);
result_t[11] = DFFEAS(result_t[11]_lut_out, clk, reset, , !write, , , , );
--result_t[12] is result_t[12]
--operation mode is normal
result_t[12]_lut_out = A1L492 & (A1L432) # !A1L492 & (A1L432 & (A1L79) # !A1L432 & A1L332);
result_t[12] = DFFEAS(result_t[12]_lut_out, clk, reset, , !write, , , , );
--result_t[13] is result_t[13]
--operation mode is normal
result_t[13]_lut_out = A1L192 & (A1L832 & (A[14]) # !A1L832 & A1L99) # !A1L192 & (A1L832);
result_t[13] = DFFEAS(result_t[13]_lut_out, clk, reset, , !write, , , , );
--result_t[14] is result_t[14]
--operation mode is normal
result_t[14]_lut_out = A1L692 & (A1L242 & (A1L901) # !A1L242 & A[13]) # !A1L692 & (A1L242);
result_t[14] = DFFEAS(result_t[14]_lut_out, clk, reset, , !write, , , , );
--result_t[15] is result_t[15]
--operation mode is normal
result_t[15]_lut_out = OP[2] & (A1L742 & (A1L942) # !A1L742 & A1L342) # !OP[2] & (A1L742);
result_t[15] = DFFEAS(result_t[15]_lut_out, clk, reset, , !write, , , , );
--c_tmp is c_tmp
--operation mode is normal
c_tmp_lut_out = OP[0] & (OP[1] & result_t[16] # !OP[1] & (A[0])) # !OP[0] & (A[0]);
c_tmp = DFFEAS(c_tmp_lut_out, clk, VCC, , A1L813, , , , );
--result_t[16] is result_t[16]
--operation mode is normal
result_t[16]_lut_out = OP[2] & OP[1] & A1L052 # !OP[2] & (A1L252);
result_t[16] = DFFEAS(result_t[16]_lut_out, clk, reset, , !write, , , , );
--A1L862 is reduce_or~1
--operation mode is normal
A1L862 = OP[2] # !OP[1] # !OP[0] # !OP[3];
--A1L962 is reduce_or~11
--operation mode is normal
A1L962 = OP[2] & OP[3];
--z1_tmp is z1_tmp
--operation mode is normal
z1_tmp_lut_out = !result_t[16] & (A1L423);
z1_tmp = DFFEAS(z1_tmp_lut_out, clk, VCC, , A1L913, , , , );
--A1L023 is Z~154
--operation mode is normal
A1L023 = !result_t[0] & !result_t[1] & !result_t[2] & !result_t[3];
--A1L123 is Z~155
--operation mode is normal
A1L123 = !result_t[4] & !result_t[5] & !result_t[6] & !result_t[7];
--A1L223 is Z~156
--operation mode is normal
A1L223 = !result_t[8] & !result_t[9] & !result_t[10] & !result_t[11];
--A1L323 is Z~157
--operation mode is normal
A1L323 = !result_t[12] & !result_t[13] & !result_t[14] & !result_t[15];
--A1L423 is Z~158
--operation mode is normal
A1L423 = A1L023 & A1L123 & A1L223 & A1L323;
--A[1] is A[1]
--operation mode is normal
A[1]_lut_out = dinput[1];
A[1] = DFFEAS(A[1]_lut_out, clk, VCC, , A1L3, , , , );
--A[0] is A[0]
--operation mode is normal
A[0]_lut_out = dinput[0];
A[0] = DFFEAS(A[0]_lut_out, clk, VCC, , A1L3, , , , );
--B[0] is B[0]
--operation mode is normal
B[0]_lut_out = dinput[0];
B[0] = DFFEAS(B[0]_lut_out, clk, VCC, , A1L931, , , , );
--A[15] is A[15]
--operation mode is normal
A[15]_lut_out = dinput[15];
A[15] = DFFEAS(A[15]_lut_out, clk, VCC, , A1L3, , , , );
--A1L671 is Mux~3074
--operation mode is normal
A1L671 = OP[0] & (B[0] # !OP[1]) # !OP[0] & (A[15] & OP[1]);
--A1L771 is Mux~3075
--operation mode is normal
A1L771 = OP[2] & (OP[1]) # !OP[2] & (OP[1] & (A1L671) # !OP[1] & A[0] & !A1L671);
--A1L91 is add~1666
--operation mode is arithmetic
A1L91 = B[0] $ A[0];
--A1L02 is add~1668
--operation mode is arithmetic
A1L02 = CARRY(A[0] # !B[0]);
--A1L12 is add~1671
--operation mode is normal
A1L12 = OP[0] & A1L91 # !OP[0] & (A[1]);
--A1L871 is Mux~3076
--operation mode is normal
A1L871 = OP[2] & (A1L771 & (A1L12) # !A1L771 & A[1]) # !OP[2] & (A1L771);
--A1L22 is add~1672
--operation mode is arithmetic
A1L22 = !A[0];
--A1L32 is add~1674
--operation mode is arithmetic
A1L32 = CARRY(A[0]);
--A1L42 is add~1677
--operation mode is normal
A1L42 = OP[0] & A1L22 # !OP[0] & (A1L91);
--A1L52 is add~1678
--operation mode is arithmetic
A1L52 = A1L121 $ A[0];
--A1L62 is add~1680
--operation mode is arithmetic
A1L62 = CARRY(A1L121 & A[0]);
--A1L971 is Mux~3077
--operation mode is normal
A1L971 = OP[2] & (OP[1]) # !OP[2] & (OP[1] & A1L42 # !OP[1] & (A1L52));
--A1L72 is add~1683
--operation mode is arithmetic
A1L72_carry_eqn = A1L02;
A1L72 = B[1] $ A[1] $ !A1L72_carry_eqn;
--A1L82 is add~1685
--operation mode is arithmetic
A1L82 = CARRY(B[1] & (!A1L02 # !A[1]) # !B[1] & !A[1] & !A1L02);
--A1L192 is result_t[1]~771
--operation mode is normal
A1L192 = OP[2] & OP[3] # !OP[2] & !OP[3] & OP[1] & !OP[0];
--B[1] is B[1]
--operation mode is normal
B[1]_lut_out = dinput[1];
B[1] = DFFEAS(B[1]_lut_out, clk, VCC, , A1L931, , , , );
--A1L081 is Mux~3079
--operation mode is normal
A1L081 = B[1] & (A[1] & (!OP[1]) # !A[1] & OP[0]) # !B[1] & (OP[0] & A[1] # !OP[0] & (OP[1]));
--A1L292 is result_t[1]~772
--operation mode is normal
A1L292 = OP[2] & (!OP[1] # !OP[0] # !OP[3]);
--A1L92 is add~1688
--operation mode is arithmetic
A1L92_carry_eqn = A1L32;
A1L92 = A[1] $ (!A1L92_carry_eqn);
--A1L03 is add~1690
--operation mode is arithmetic
A1L03 = CARRY(!A[1] & (!A1L32));
--A1L392 is result_t[1]~773
--operation mode is normal
A1L392 = OP[3] & (!OP[0] # !OP[1]) # !OP[3] & OP[1];
--A1L13 is add~1693
--operation mode is arithmetic
A1L13_carry_eqn = A1L62;
A1L13 = A1L221 $ A[1] $ A1L13_carry_eqn;
--A1L23 is add~1695
--operation mode is arithmetic
A1L23 = CARRY(A1L221 & !A[1] & !A1L62 # !A1L221 & (!A1L62 # !A[1]));
--A1L181 is Mux~3080
--operation mode is normal
A1L181 = A1L392 & (OP[3]) # !A1L392 & (OP[3] & B[1] # !OP[3] & (A1L13));
--A1L281 is Mux~3081
--operation mode is normal
A1L281 = A1L392 & (A1L181 & (A[0]) # !A1L181 & A1L92) # !A1L392 & (A1L181);
--A1L381 is Mux~3082
--operation mode is normal
A1L381 = A1L192 & (A1L292) # !A1L192 & (A1L292 & A1L081 # !A1L292 & (A1L281));
--A[2] is A[2]
--operation mode is normal
A[2]_lut_out = dinput[2];
A[2] = DFFEAS(A[2]_lut_out, clk, VCC, , A1L3, , , , );
--A1L692 is result_t[2]~774
--operation mode is normal
A1L692 = OP[3] & (OP[2] $ (!OP[0] # !OP[1])) # !OP[3] & OP[1] & !OP[0] & !OP[2];
--B[2] is B[2]
--operation mode is normal
B[2]_lut_out = dinput[2];
B[2] = DFFEAS(B[2]_lut_out, clk, VCC, , A1L931, , , , );
--A1L792 is result_t[2]~775
--operation mode is normal
A1L792 = OP[2] & OP[0] # !OP[2] & (OP[3]);
--A1L481 is Mux~3084
--operation mode is normal
A1L481 = B[2] & A1L792 & (!A[2] # !OP[2]);
--A1L581 is Mux~3085
--operation mode is normal
A1L581 = OP[2] & !B[2] & (A[2] # !OP[0]);
--A1L33 is add~1698
--operation mode is arithmetic
A1L33_carry_eqn = A1L03;
A1L33 = A[2] $ (A1L33_carry_eqn);
--A1L43 is add~1700
--operation mode is arithmetic
A1L43 = CARRY(A[2] # !A1L03);
--A1L681 is Mux~3086
--operation mode is normal
A1L681 = !OP[2] & !OP[3];
--A1L781 is Mux~3087
--operation mode is normal
A1L781 = A1L481 # A1L581 # A1L33 & A1L681;
--A1L892 is result_t[2]~776
--operation mode is normal
A1L892 = OP[1] # OP[2] & OP[0];
--A1L992 is result_t[2]~777
--operation mode is normal
A1L992 = OP[2] & (!OP[1]);
--A1L53 is add~1703
--operation mode is arithmetic
A1L53_carry_eqn = A1L23;
A1L53 = A1L321 $ A[2] $ !A1L53_carry_eqn;
--A1L63 is add~1705
--operation mode is arithmetic
A1L63 = CARRY(A1L321 & (A[2] # !A1L23) # !A1L321 & A[2] & !A1L23);
--A1L492 is result_t[1]~778
--operation mode is normal
A1L492 = OP[3] & (!OP[1] # !OP[0]);
--A[3] is A[3]
--operation mode is normal
A[3]_lut_out = dinput[3];
A[3] = DFFEAS(A[3]_lut_out, clk, VCC, , A1L3, , , , );
--A1L881 is Mux~3088
--operation mode is normal
A1L881 = A1L692 & (!A1L492) # !A1L692 & (A1L492 & (A[3]) # !A1L492 & A1L062);
--A1L73 is add~1708
--operation mode is arithmetic
A1L73_carry_eqn = A1L82;
A1L73 = B[2] $ A[2] $ A1L73_carry_eqn;
--A1L83 is add~1710
--operation mode is arithmetic
A1L83 = CARRY(B[2] & A[2] & !A1L82 # !B[2] & (A[2] # !A1L82));
--B[3] is B[3]
--operation mode is normal
B[3]_lut_out = dinput[3];
B[3] = DFFEAS(B[3]_lut_out, clk, VCC, , A1L931, , , , );
--A1L981 is Mux~3090
--operation mode is normal
A1L981 = B[3] & (A[3] & (!OP[1]) # !A[3] & OP[0]) # !B[3] & (OP[0] & A[3] # !OP[0] & (OP[1]));
--A1L93 is add~1713
--operation mode is arithmetic
A1L93_carry_eqn = A1L83;
A1L93 = B[3] $ A[3] $ !A1L93_carry_eqn;
--A1L04 is add~1715
--operation mode is arithmetic
A1L04 = CARRY(B[3] & (!A1L83 # !A[3]) # !B[3] & !A[3] & !A1L83);
--A1L14 is add~1718
--operation mode is arithmetic
A1L14_carry_eqn = A1L43;
A1L14 = A[3] $ (!A1L14_carry_eqn);
--A1L24 is add~1720
--operation mode is arithmetic
A1L24 = CARRY(!A[3] & (!A1L43));
--A1L34 is add~1723
--operation mode is arithmetic
A1L34_carry_eqn = A1L63;
A1L34 = A1L421 $ A[3] $ A1L34_carry_eqn;
--A1L44 is add~1725
--operation mode is arithmetic
A1L44 = CARRY(A1L421 & !A[3] & !A1L63 # !A1L421 & (!A1L63 # !A[3]));
--A1L091 is Mux~3091
--operation mode is normal
A1L091 = A1L392 & (OP[3]) # !A1L392 & (OP[3] & B[3] # !OP[3] & (A1L34));
--A1L191 is Mux~3092
--operation mode is normal
A1L191 = A1L392 & (A1L091 & (A[2]) # !A1L091 & A1L14) # !A1L392 & (A1L091);
--A1L291 is Mux~3093
--operation mode is normal
A1L291 = A1L292 & (A1L192) # !A1L292 & (A1L192 & A1L93 # !A1L192 & (A1L191));
--A[4] is A[4]
--operation mode is normal
A[4]_lut_out = dinput[4];
A[4] = DFFEAS(A[4]_lut_out, clk, VCC, , A1L3, , , , );
--B[4] is B[4]
--operation mode is normal
B[4]_lut_out = dinput[4];
B[4] = DFFEAS(B[4]_lut_out, clk, VCC, , A1L931, , , , );
--A1L391 is Mux~3095
--operation mode is normal
A1L391 = A1L792 & B[4] & (!A[4] # !OP[2]);
--A1L491 is Mux~3096
--operation mode is normal
A1L491 = OP[2] & !B[4] & (A[4] # !OP[0]);
--A1L54 is add~1728
--operation mode is arithmetic
A1L54_carry_eqn = A1L24;
A1L54 = A[4] $ (A1L54_carry_eqn);
--A1L64 is add~1730
--operation mode is arithmetic
A1L64 = CARRY(A[4] # !A1L24);
--A1L591 is Mux~3097
--operation mode is normal
A1L591 = A1L391 # A1L491 # A1L54 & A1L681;
--A1L74 is add~1733
--operation mode is arithmetic
A1L74_carry_eqn = A1L44;
A1L74 = A1L521 $ A[4] $ !A1L74_carry_eqn;
--A1L84 is add~1735
--operation mode is arithmetic
A1L84 = CARRY(A1L521 & (A[4] # !A1L44) # !A1L521 & A[4] & !A1L44);
--A1L691 is Mux~3098
--operation mode is normal
A1L691 = A1L992 & (A1L892) # !A1L992 & (A1L892 & A1L591 # !A1L892 & (A1L74));
--A1L791 is Mux~3099
--operation mode is normal
A1L791 = B[4] & (A1L691 # A[4] & A1L992) # !B[4] & A1L691 & (A[4] # !A1L992);
--A[5] is A[5]
--operation mode is normal
A[5]_lut_out = dinput[5];
A[5] = DFFEAS(A[5]_lut_out, clk, VCC, , A1L3, , , , );
--A1L891 is Mux~3100
--operation mode is normal
A1L891 = A1L492 & (A1L692 & A[3] # !A1L692 & (A[5])) # !A1L492 & (A1L692);
--A1L94 is add~1738
--operation mode is arithmetic
A1L94_carry_eqn = A1L04;
A1L94 = B[4] $ A[4] $ A1L94_carry_eqn;
--A1L05 is add~1740
--operation mode is arithmetic
A1L05 = CARRY(B[4] & A[4] & !A1L04 # !B[4] & (A[4] # !A1L04));
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