?? change.vhd
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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
package mypack is
function change(
maxmindata:std_logic_vector(7 downto 0)
) return std_logic_vector;
end mypack;
package body mypack is
function change(
maxmindata:std_logic_vector(7 downto 0)) return std_logic_vector is
variable tmp:integer range 255 downto 0;
variable ret:std_logic_vector(7 downto 0);
variable i:integer ;
begin
i:=conv_integer(maxmindata);
i:=i*50;
i:=i/255;
tmp:=i;
tmp:=tmp/10;
ret(7 downto 4):=conv_std_logic_vector(tmp,4);
tmp:=i-tmp*10;
ret(3 downto 0):=conv_std_logic_vector(tmp,4);
--tmp:=i-100*conv_integer(ret(11 downto 8))-10*conv_integer(ret(7 downto 4));
--ret(3 downto 0):=conv_std_logic_vector(tmp,4);
return ret;
end change;
end mypack;
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