|light
RedA <= controller:inst.reda
Clk25MHz => predevide2:inst9.Clkin
Hold => controller:inst.hold
Hold => counter:inst1.hold
Reset => counter:inst1.reset
GreenA <= controller:inst.greena
YellowA <= controller:inst.yellowa
RedB <= controller:inst.redb
GreenB <= controller:inst.greenb
YellowB <= controller:inst.yellowb
DisplayA[6] <= display:inst2.display[6]
DisplayA[5] <= display:inst2.display[5]
DisplayA[4] <= display:inst2.display[4]
DisplayA[3] <= display:inst2.display[3]
DisplayA[2] <= display:inst2.display[2]
DisplayA[1] <= display:inst2.display[1]
DisplayA[0] <= display:inst2.display[0]
DisplayB[6] <= display:inst5.display[6]
DisplayB[5] <= display:inst5.display[5]
DisplayB[4] <= display:inst5.display[4]
DisplayB[3] <= display:inst5.display[3]
DisplayB[2] <= display:inst5.display[2]
DisplayB[1] <= display:inst5.display[1]
DisplayB[0] <= display:inst5.display[0]


|light|controller:inst
clock => process0~0.IN0
hold => flash~reg0.DATAIN
hold => numa~20.OUTPUTSELECT
hold => numa~19.OUTPUTSELECT
hold => numa~18.OUTPUTSELECT
hold => numa~17.OUTPUTSELECT
hold => numa~16.OUTPUTSELECT
hold => yellowb~0.OUTPUTSELECT
hold => yellowa~1.OUTPUTSELECT
hold => greenb~0.OUTPUTSELECT
hold => greena~1.OUTPUTSELECT
hold => redb~0.OUTPUTSELECT
hold => reda~0.OUTPUTSELECT
countnum[0] => numa~5.IN0
countnum[0] => LessThan1.IN12
countnum[0] => LessThan0.IN12
countnum[1] => numa~4.IN0
countnum[1] => LessThan1.IN11
countnum[1] => LessThan0.IN11
countnum[2] => numa~3.IN0
countnum[2] => LessThan1.IN10
countnum[2] => LessThan0.IN10
countnum[3] => numa~2.IN0
countnum[3] => LessThan1.IN9
countnum[3] => LessThan0.IN9
countnum[4] => numa~1.IN0
countnum[4] => LessThan1.IN8
countnum[4] => LessThan0.IN8
countnum[5] => numa~0.IN0
countnum[5] => LessThan1.IN7
countnum[5] => LessThan0.IN7
numa[0] <= numa[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
numa[1] <= numa[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
numa[2] <= numa[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
numa[3] <= numa[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
numa[4] <= numa[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
numb[0] <= <GND>
numb[1] <= <GND>
numb[2] <= <GND>
numb[3] <= <GND>
numb[4] <= <GND>
reda <= reda~reg0.DB_MAX_OUTPUT_PORT_TYPE
greena <= greena~reg0.DB_MAX_OUTPUT_PORT_TYPE
yellowa <= yellowa~reg0.DB_MAX_OUTPUT_PORT_TYPE
redb <= redb~reg0.DB_MAX_OUTPUT_PORT_TYPE
greenb <= greenb~reg0.DB_MAX_OUTPUT_PORT_TYPE
yellowb <= yellowb~reg0.DB_MAX_OUTPUT_PORT_TYPE
flash <= flash~reg0.DB_MAX_OUTPUT_PORT_TYPE


|light|FreDevide10:inst8
Clkin => Counter[2].CLK
Clkin => Counter[1].CLK
Clkin => Counter[0].CLK
Clkin => Clk.CLK
Clkout <= Clk.DB_MAX_OUTPUT_PORT_TYPE


|light|predevide2:inst9
Clkin => Counter[20].CLK
Clkin => Counter[19].CLK
Clkin => Counter[18].CLK
Clkin => Counter[17].CLK
Clkin => Counter[16].CLK
Clkin => Counter[15].CLK
Clkin => Counter[14].CLK
Clkin => Counter[13].CLK
Clkin => Counter[12].CLK
Clkin => Counter[11].CLK
Clkin => Counter[10].CLK
Clkin => Counter[9].CLK
Clkin => Counter[8].CLK
Clkin => Counter[7].CLK
Clkin => Counter[6].CLK
Clkin => Counter[5].CLK
Clkin => Counter[4].CLK
Clkin => Counter[3].CLK
Clkin => Counter[2].CLK
Clkin => Counter[1].CLK
Clkin => Counter[0].CLK
Clkin => Clk.CLK
Clkout <= Clk.DB_MAX_OUTPUT_PORT_TYPE


|light|counter:inst1
clock => counternum[5]~reg0.CLK
clock => counternum[4]~reg0.CLK
clock => counternum[3]~reg0.CLK
clock => counternum[2]~reg0.CLK
clock => counternum[1]~reg0.CLK
clock => counternum[0]~reg0.CLK
reset => counternum[5]~reg0.ACLR
reset => counternum[4]~reg0.ACLR
reset => counternum[3]~reg0.ACLR
reset => counternum[2]~reg0.ACLR
reset => counternum[1]~reg0.ACLR
reset => counternum[0]~reg0.ACLR
hold => counternum~11.OUTPUTSELECT
hold => counternum~10.OUTPUTSELECT
hold => counternum~9.OUTPUTSELECT
hold => counternum~8.OUTPUTSELECT
hold => counternum~7.OUTPUTSELECT
hold => counternum~6.OUTPUTSELECT
counternum[0] <= counternum[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counternum[1] <= counternum[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counternum[2] <= counternum[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counternum[3] <= counternum[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counternum[4] <= counternum[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
counternum[5] <= counternum[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|light|display:inst2
clock => timeout[5].CLK
clock => timeout[4].CLK
clock => timeout[3].CLK
clock => timeout[2].CLK
clock => timeout[1].CLK
clock => timeout[0].CLK
clock => display[0]~reg0.CLK
clock => display[1]~reg0.CLK
clock => display[2]~reg0.CLK
clock => display[3]~reg0.CLK
clock => display[4]~reg0.CLK
clock => display[5]~reg0.CLK
clock => display[6]~reg0.CLK
clock => display[7]~reg0.CLK
flash => process0~0.IN0
qin[0] => Mux6.IN19
qin[0] => Mux5.IN19
qin[0] => Mux4.IN19
qin[0] => Mux3.IN19
qin[0] => Mux2.IN19
qin[0] => Mux1.IN19
qin[0] => Mux0.IN19
qin[1] => Mux6.IN18
qin[1] => Mux5.IN18
qin[1] => Mux4.IN18
qin[1] => Mux3.IN18
qin[1] => Mux2.IN18
qin[1] => Mux1.IN18
qin[1] => Mux0.IN18
qin[2] => Mux6.IN17
qin[2] => Mux5.IN17
qin[2] => Mux4.IN17
qin[2] => Mux3.IN17
qin[2] => Mux2.IN17
qin[2] => Mux1.IN17
qin[2] => Mux0.IN17
qin[3] => Mux6.IN16
qin[3] => Mux5.IN16
qin[3] => Mux4.IN16
qin[3] => Mux3.IN16
qin[3] => Mux2.IN16
qin[3] => Mux1.IN16
qin[3] => Mux0.IN16
display[7] <= display[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[6] <= display[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[5] <= display[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[4] <= display[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[3] <= display[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[2] <= display[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[1] <= display[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[0] <= display[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|light|fenwei:inst3
numin[0] => LessThan1.IN10
numin[0] => LessThan0.IN10
numin[0] => numb[0].DATAIN
numin[1] => numb~5.DATAB
numin[1] => numb~2.DATAA
numin[1] => Add1.IN8
numin[1] => LessThan1.IN9
numin[1] => LessThan0.IN9
numin[2] => numb~1.DATAA
numin[2] => Add1.IN7
numin[2] => LessThan1.IN8
numin[2] => Add0.IN6
numin[2] => LessThan0.IN8
numin[3] => numb~0.DATAA
numin[3] => Add1.IN6
numin[3] => LessThan1.IN7
numin[3] => Add0.IN5
numin[3] => LessThan0.IN7
numin[4] => Add1.IN5
numin[4] => LessThan1.IN6
numin[4] => Add0.IN4
numin[4] => LessThan0.IN6
numa[0] <= numa~1.DB_MAX_OUTPUT_PORT_TYPE
numa[1] <= numa~0.DB_MAX_OUTPUT_PORT_TYPE
numa[2] <= <GND>
numa[3] <= <GND>
numb[0] <= numin[0].DB_MAX_OUTPUT_PORT_TYPE
numb[1] <= numb~5.DB_MAX_OUTPUT_PORT_TYPE
numb[2] <= numb~4.DB_MAX_OUTPUT_PORT_TYPE
numb[3] <= numb~3.DB_MAX_OUTPUT_PORT_TYPE


|light|display:inst5
clock => timeout[5].CLK
clock => timeout[4].CLK
clock => timeout[3].CLK
clock => timeout[2].CLK
clock => timeout[1].CLK
clock => timeout[0].CLK
clock => display[0]~reg0.CLK
clock => display[1]~reg0.CLK
clock => display[2]~reg0.CLK
clock => display[3]~reg0.CLK
clock => display[4]~reg0.CLK
clock => display[5]~reg0.CLK
clock => display[6]~reg0.CLK
clock => display[7]~reg0.CLK
flash => process0~0.IN0
qin[0] => Mux6.IN19
qin[0] => Mux5.IN19
qin[0] => Mux4.IN19
qin[0] => Mux3.IN19
qin[0] => Mux2.IN19
qin[0] => Mux1.IN19
qin[0] => Mux0.IN19
qin[1] => Mux6.IN18
qin[1] => Mux5.IN18
qin[1] => Mux4.IN18
qin[1] => Mux3.IN18
qin[1] => Mux2.IN18
qin[1] => Mux1.IN18
qin[1] => Mux0.IN18
qin[2] => Mux6.IN17
qin[2] => Mux5.IN17
qin[2] => Mux4.IN17
qin[2] => Mux3.IN17
qin[2] => Mux2.IN17
qin[2] => Mux1.IN17
qin[2] => Mux0.IN17
qin[3] => Mux6.IN16
qin[3] => Mux5.IN16
qin[3] => Mux4.IN16
qin[3] => Mux3.IN16
qin[3] => Mux2.IN16
qin[3] => Mux1.IN16
qin[3] => Mux0.IN16
display[7] <= display[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[6] <= display[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[5] <= display[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[4] <= display[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[3] <= display[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[2] <= display[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[1] <= display[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
display[0] <= display[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE