# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		i2c_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "23:30:26  SEPTEMBER 08, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 5.1
set_global_assignment -name VERILOG_FILE i2c.v

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_127 -to clk
set_location_assignment PIN_132 -to en[0]
set_location_assignment PIN_131 -to en[1]
set_location_assignment PIN_95 -to lowbit
set_location_assignment PIN_101 -to rd_input
set_location_assignment PIN_102 -to wr_input
set_location_assignment PIN_110 -to rst
set_location_assignment PIN_78 -to sda
set_location_assignment PIN_120 -to seg_data[0]
set_location_assignment PIN_119 -to seg_data[1]
set_location_assignment PIN_117 -to seg_data[2]
set_location_assignment PIN_114 -to seg_data[3]
set_location_assignment PIN_113 -to seg_data[4]
set_location_assignment PIN_111 -to seg_data[5]
set_location_assignment PIN_108 -to seg_data[6]
set_location_assignment PIN_109 -to seg_data[7]
set_location_assignment PIN_81 -to scl
set_location_assignment PIN_71 -to data_in[0]
set_location_assignment PIN_69 -to data_in[1]
set_location_assignment PIN_68 -to data_in[2]
set_location_assignment PIN_67 -to data_in[3]
set_location_assignment PIN_63 -to data_in[4]
set_location_assignment PIN_62 -to data_in[5]
set_location_assignment PIN_61 -to data_in[6]
set_location_assignment PIN_60 -to data_in[7]

# Timing Assignments
# ==================
set_global_assignment -name IGNORE_CLOCK_SETTINGS ON
set_global_assignment -name FMAX_REQUIREMENT "45.0 MHz"

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY "MAX II"
set_global_assignment -name MAX7000_OPTIMIZATION_TECHNIQUE SPEED
set_global_assignment -name TOP_LEVEL_ENTITY i2c

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EPM1270T144C5
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS OUTPUT DRIVING AN UNSPECIFIED SIGNAL"
set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF