?? adc_ctrl.psm
字號:
ADDCY s5, s3 ;to restore value
SL0 s6 ;shift '0' into result because subtract was not possible
div10_shifts: SLA s7 ;complete 16-bit shift left
SR0 s3 ;divide '10' value by 2 (shift right 1 place)
SRA s2
SUB s1, 01 ;count iterations
JUMP NZ, div10_loop
RETURN
;
;
;**************************************************************************************
;SPI communication routines for Spartan-3E Starter Kit
;**************************************************************************************
;
;These routines will work with two output ports and one input port which should be
;defined as follows using CONSTANT directives.
; (replace 'pp' with appropriate port address in each case)
;In the list of CONSTANT directives, there are ports associated with all the SPI devices
;provided on the board. Even if some devices are not used, it is vital that the remaining
;devices are disabled. Leaving all signals connected and use of these routines will ensure
;that all other devices are disabled when communicating with a particular device.
;
;
;
;CONSTANT SPI_control_port, pp ;SPI clock and chip selects
;CONSTANT SPI_sck, 01 ; SCK - bit0
;CONSTANT SPI_rom_cs, 02 ; serial rom select - bit1
;CONSTANT SPI_spare_control, 04 ; spare - bit2
;CONSTANT SPI_amp_cs, 08 ; amplifier select - bit3
;CONSTANT SPI_adc_conv, 10 ; A/D convert - bit4
;CONSTANT SPI_dac_cs, 20 ; D/A select - bit5
;CONSTANT SPI_amp_shdn, 40 ; amplifier SHDN - bit6
;CONSTANT SPI_dac_clr, 80 ; D/A clear - bit7
;
;CONSTANT SPI_output_port, pp ;SPI data output
;CONSTANT SPI_sdo, 80 ; SDO - bit7
;
;CONSTANT SPI_input_port, pp ;SPI data input
;CONSTANT SPI_sdi, 80 ; SDI - bit7
;CONSTANT SPI_amp_sdi, 40 ; amplifier SDI - bit6
;
;
;
;
;Initialise SPI bus
;
;This routine should be used to initialise the SPI bus.
;The SCK clock is made low.
;Device selections are made inactive as follows
; SPI_sck = 0 Clock is Low (required)
; SPI_rom_cs = 1 Deselect ROM
; spare = 1 spare control bit
; SPI_amp_cs = 1 Deselect amplifier
; SPI_adc_conv = 0 A/D convert ready to apply positive pulse
; SPI_dac_cs = 1 Deselect D/A
; SPI_amp_shdn = 0 Amplifier active and available
; SPI_dac_clr = 1 D/A clear off
;
SPI_init: LOAD s0, AE ;normally AE
OUTPUT s0, SPI_control_port
RETURN
;
;
;
;
;**************************************************************************************
;SPI communication routines for Programmable Amplifier
;**************************************************************************************
;
;
;Set the A and B channel gain of the Dual Amplifier (LTC6912-1).
;
;The gain value should be provided in the s2 register with the upper nibble
;defining the gain for the B channel and lower nibble the gain for the A channel.
; 0000 = 0 hex = Gain 0 with input hi-Z and output driving
; 0001 = 1 hex = Gain -1
; 0010 = 2 hex = Gain -2
; 0011 = 3 hex = Gain -5
; 0100 = 4 hex = Gain -10
; 0101 = 5 hex = Gain -20
; 0110 = 6 hex = Gain -50
; 0111 = 7 hex = Gain -100
; 1000 = 8 hex = software shutdown (power on default). Hi-Z output.
;
;On return, the s2, register will contain the response from the LTC6912-1 amplifier.
;This will be the same format and indicate the previous setting of the amplifier.
;The response is obtained from the dedicated AMP_SDI signal since the LTC6912 output
;is always active and can not be on a shared SPI bus.
;
set_amp: CALL SPI_init ;ensure known state of bus and s0 register
XOR s0, SPI_amp_cs ;select low on Amplifier chip select
OUTPUT s0, SPI_control_port
LOAD s1, 08 ;8-bits to transmit and receive
next_amp_SPI_bit: OUTPUT s2, SPI_output_port ;output data bit
XOR s0, SPI_sck ;clock High (bit0)
OUTPUT s0, SPI_control_port ;drive clock High
INPUT s3, SPI_input_port ;read input bit
TEST s3, SPI_amp_sdi ;detect state of received bit
SLA s2 ;shift new data into result and move to next transmit bit
XOR s0, SPI_sck ;clock Low (bit0)
OUTPUT s0, SPI_control_port ;drive clock Low
SUB s1, 01 ;count bits
JUMP NZ, next_amp_SPI_bit ;repeat until finished
XOR s0, SPI_amp_cs ;deselect the amplifier
OUTPUT s0, SPI_control_port
RETURN
;
;
;
;**************************************************************************************
;SPI communication routines for A/D Converter
;**************************************************************************************
;
;
;
;Sample A/D converter (LTC1407A-1) and return results.
;
;Note there is a latency of one read to obtain the value. Each read results in the
;the analogue inputs being sampled and converted but this value will only be transmitted
;during the next read and conversion cycle.
;
;The results are returned as follows.
; Channel 0 in registers [s9,s8]
; Channel 1 in registers [s7,s6]
;Where each is a 14-bit twos complement value sign extended to 16-bits.
;
;Each 14-bit value represents the analogue voltage in the range -1.25v to +1.25v
;relative to the reference voltage of 1.65v (3.3v/2). Hence the actual input voltage
;range is 0.4v to 2.9v. Since the input to the A/D is supplied via the programmable
;amplifier, the VINA and VINB inputs are inverted and may cover a smaller range if ;
;desired.
;
;Examples
; VINA = 0.65v with gain=-1 means input to A/D = 2.65v
; This is equivalent to +1.00v which is value (8192/1.25)*1 = 6553 (1999 hex)
;
; VINA = 2.65v with gain=-1 means input to A/D = 0.65v
; This is equivalent to -1.00v which is value (2048/1.25)*-1 = -6553 (E667 hex)
;
;
;Although the A/D converter claims to be an SPI device, it really
;does not conform to the normal specification of the 4-wire interface.
;
;Firstly the CONV signal is only pulsed High and does not behave like
;a normal active low select signal. Secondly, the communication is
;34 bits which does not fit a byte boundary, and thirdly, the data output
;to its SDO pin changes as a result of rising edges of SCK clock which
;is not the same as the falling edge used by other devices.
;
adc_read: CALL SPI_init ;ensure known state of bus and s0 register
XOR s0, SPI_adc_conv ;Pulse AD-CONV High to take sample and start
OUTPUT s0, SPI_control_port ; conversion and transmission of data.
XOR s0, SPI_adc_conv ;AD-CONV Low
OUTPUT s0, SPI_control_port
LOAD s1, 22 ;34 clocks to read all data
next_adc_bit: XOR s0, SPI_sck ;clock High (bit0)
OUTPUT s0, SPI_control_port ;drive clock High
XOR s0, SPI_sck ;clock Low (bit0)
OUTPUT s0, SPI_control_port ;drive clock Low
INPUT s3, SPI_input_port ;read input bit
TEST s3, SPI_sdi ;detect state of received bit
SLA s6 ;shift new data into result registers
SLA s7
SLA s8
SLA s9
SUB s1, 01 ;count bits
JUMP NZ, next_adc_bit ;repeat until finished
SRX s9 ;sign extend 14-bit result in [s9,s8]
SRA s8
SRX s9
SRA s8
SRX s7 ;sign extend 14-bit result in [s7,s6]
SRA s6
SRX s7
SRA s6
RETURN
;
;
;**************************************************************************************
;LCD text messages
;**************************************************************************************
;
;
;Display 'PicoBlaze' on LCD at current cursor position
;
;
disp_PicoBlaze: LOAD s5, character_P
CALL LCD_write_data
LOAD s5, character_i
CALL LCD_write_data
LOAD s5, character_c
CALL LCD_write_data
LOAD s5, character_o
CALL LCD_write_data
LOAD s5, character_B
CALL LCD_write_data
LOAD s5, character_l
CALL LCD_write_data
LOAD s5, character_a
CALL LCD_write_data
LOAD s5, character_z
CALL LCD_write_data
LOAD s5, character_e
CALL LCD_write_data
RETURN
;
;
;Display 'ADC Control' on LCD at current cursor position
;
;
disp_ADC_Control: LOAD s5, character_A
CALL LCD_write_data
LOAD s5, character_D
CALL LCD_write_data
LOAD s5, character_C
CALL LCD_write_data
LOAD s5, character_space
CALL LCD_write_data
LOAD s5, character_C
CALL LCD_write_data
LOAD s5, character_o
CALL LCD_write_data
LOAD s5, character_n
CALL LCD_write_data
LOAD s5, character_t
CALL LCD_write_data
LOAD s5, character_r
CALL LCD_write_data
LOAD s5, character_o
CALL LCD_write_data
LOAD s5, character_l
CALL LCD_write_data
RETURN
;
;
;Display 'VA=' on LCD at current cursor position
;
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