library ieee;
use ieee.std_logic_1164.all;

entity kcom is
      port(A,B,C,D,E,F,G,H  : in  std_logic;
           T                : out std_logic);
end kcom;

architecture kcom_arc of kcom is
begin
     process(A,B,C,D,E,F,G,H)
     begin
          if(A = E and B=F and C=G and D=H) then
               T <='1';
          else
               T<='0';
          end if;
     end process;
end kcom_arc;