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?? jfqs_multiplier.map.eqn

?? 使用加法器樹乘法器實現8位乘法運算
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--E1L4 is add1:U10|add~158
--operation mode is arithmetic

E1L4 = CARRY(B2L3 & !B1L2 & !E1L2 # !B2L3 & (!E1L2 # !B1L2));


--E4L71 is add1:U19|add~191
--operation mode is normal

E4L71_carry_eqn = E4L61;
E4L71 = !E4L71_carry_eqn;


--E3L31 is add1:U16|add~181
--operation mode is arithmetic

E3L31_carry_eqn = E3L21;
E3L31 = B6L8 $ B5L7 $ !E3L31_carry_eqn;

--E3L41 is add1:U16|add~183
--operation mode is arithmetic

E3L41 = CARRY(B6L8 & (B5L7 # !E3L21) # !B6L8 & B5L7 & !E3L21);


--E2L9 is add1:U13|add~171
--operation mode is arithmetic

E2L9_carry_eqn = E2L8;
E2L9 = B4L6 $ B3L5 $ !E2L9_carry_eqn;

--E2L01 is add1:U13|add~173
--operation mode is arithmetic

E2L01 = CARRY(B4L6 & (B3L5 # !E2L8) # !B4L6 & B3L5 & !E2L8);


--E1L5 is add1:U10|add~161
--operation mode is arithmetic

E1L5_carry_eqn = E1L4;
E1L5 = B2L4 $ B1L3 $ !E1L5_carry_eqn;

--E1L6 is add1:U10|add~163
--operation mode is arithmetic

E1L6 = CARRY(B2L4 & (B1L3 # !E1L4) # !B2L4 & B1L3 & !E1L4);


--E3L51 is add1:U16|add~186
--operation mode is arithmetic

E3L51_carry_eqn = E3L41;
E3L51 = E3L51_carry_eqn $ (c2[7] & c1[3]);

--E3L61 is add1:U16|add~188
--operation mode is arithmetic

E3L61 = CARRY(!E3L41 # !c1[3] # !c2[7]);


--E2L11 is add1:U13|add~176
--operation mode is arithmetic

E2L11_carry_eqn = E2L01;
E2L11 = B4L7 $ B3L6 $ E2L11_carry_eqn;

--E2L21 is add1:U13|add~178
--operation mode is arithmetic

E2L21 = CARRY(B4L7 & !B3L6 & !E2L01 # !B4L7 & (!E2L01 # !B3L6));


--E1L7 is add1:U10|add~166
--operation mode is arithmetic

E1L7_carry_eqn = E1L6;
E1L7 = B2L5 $ B1L4 $ E1L7_carry_eqn;

--E1L8 is add1:U10|add~168
--operation mode is arithmetic

E1L8 = CARRY(B2L5 & !B1L4 & !E1L6 # !B2L5 & (!E1L6 # !B1L4));


--E3L71 is add1:U16|add~191
--operation mode is normal

E3L71_carry_eqn = E3L61;
E3L71 = !E3L71_carry_eqn;


--E2L31 is add1:U13|add~181
--operation mode is arithmetic

E2L31_carry_eqn = E2L21;
E2L31 = B4L8 $ B3L7 $ !E2L31_carry_eqn;

--E2L41 is add1:U13|add~183
--operation mode is arithmetic

E2L41 = CARRY(B4L8 & (B3L7 # !E2L21) # !B4L8 & B3L7 & !E2L21);


--E1L9 is add1:U10|add~171
--operation mode is arithmetic

E1L9_carry_eqn = E1L8;
E1L9 = B2L6 $ B1L5 $ !E1L9_carry_eqn;

--E1L01 is add1:U10|add~173
--operation mode is arithmetic

E1L01 = CARRY(B2L6 & (B1L5 # !E1L8) # !B2L6 & B1L5 & !E1L8);


--E2L51 is add1:U13|add~186
--operation mode is arithmetic

E2L51_carry_eqn = E2L41;
E2L51 = E2L51_carry_eqn $ (c2[7] & c1[5]);

--E2L61 is add1:U13|add~188
--operation mode is arithmetic

E2L61 = CARRY(!E2L41 # !c1[5] # !c2[7]);


--E1L11 is add1:U10|add~176
--operation mode is arithmetic

E1L11_carry_eqn = E1L01;
E1L11 = B2L7 $ B1L6 $ E1L11_carry_eqn;

--E1L21 is add1:U10|add~178
--operation mode is arithmetic

E1L21 = CARRY(B2L7 & !B1L6 & !E1L01 # !B2L7 & (!E1L01 # !B1L6));


--E2L71 is add1:U13|add~191
--operation mode is normal

E2L71_carry_eqn = E2L61;
E2L71 = !E2L71_carry_eqn;


--E1L31 is add1:U10|add~181
--operation mode is arithmetic

E1L31_carry_eqn = E1L21;
E1L31 = B2L8 $ B1L7 $ !E1L31_carry_eqn;

--E1L41 is add1:U10|add~183
--operation mode is arithmetic

E1L41 = CARRY(B2L8 & (B1L7 # !E1L21) # !B2L8 & B1L7 & !E1L21);


--E1L51 is add1:U10|add~186
--operation mode is arithmetic

E1L51_carry_eqn = E1L41;
E1L51 = E1L51_carry_eqn $ (c2[7] & c1[7]);

--E1L61 is add1:U10|add~188
--operation mode is arithmetic

E1L61 = CARRY(!E1L41 # !c1[7] # !c2[7]);


--E1L71 is add1:U10|add~191
--operation mode is normal

E1L71_carry_eqn = E1L61;
E1L71 = !E1L71_carry_eqn;


--c2[2] is c2[2]
--operation mode is normal

c2[2]_lut_out = multiplicand[2];
c2[2] = DFFEAS(c2[2]_lut_out, clock, VCC, , , , , , );


--B8L2 is and_mode:U7|out1[2]~81
--operation mode is normal

B8L2 = c1[0] & c2[2];


--B7L2 is and_mode:U6|out1[1]~74
--operation mode is normal

B7L2 = c2[1] & c1[1];


--c2[3] is c2[3]
--operation mode is normal

c2[3]_lut_out = multiplicand[3];
c2[3] = DFFEAS(c2[3]_lut_out, clock, VCC, , , , , , );


--B8L3 is and_mode:U7|out1[3]~82
--operation mode is normal

B8L3 = c1[0] & c2[3];


--B7L3 is and_mode:U6|out1[2]~75
--operation mode is normal

B7L3 = c1[1] & c2[2];


--B6L2 is and_mode:U5|out1[1]~81
--operation mode is normal

B6L2 = c2[1] & c1[2];


--c1[3] is c1[3]
--operation mode is normal

c1[3]_lut_out = multiplier[3];
c1[3] = DFFEAS(c1[3]_lut_out, clock, VCC, , , , , , );


--B5L1 is and_mode:U4|out1[0]~73
--operation mode is normal

B5L1 = c2[0] & c1[3];


--c2[4] is c2[4]
--operation mode is normal

c2[4]_lut_out = multiplicand[4];
c2[4] = DFFEAS(c2[4]_lut_out, clock, VCC, , , , , , );


--B8L4 is and_mode:U7|out1[4]~83
--operation mode is normal

B8L4 = c1[0] & c2[4];


--B7L4 is and_mode:U6|out1[3]~76
--operation mode is normal

B7L4 = c1[1] & c2[3];


--B6L3 is and_mode:U5|out1[2]~82
--operation mode is normal

B6L3 = c1[2] & c2[2];


--B5L2 is and_mode:U4|out1[1]~74
--operation mode is normal

B5L2 = c2[1] & c1[3];


--c2[5] is c2[5]
--operation mode is normal

c2[5]_lut_out = multiplicand[5];
c2[5] = DFFEAS(c2[5]_lut_out, clock, VCC, , , , , , );


--B8L5 is and_mode:U7|out1[5]~84
--operation mode is normal

B8L5 = c1[0] & c2[5];


--B7L5 is and_mode:U6|out1[4]~77
--operation mode is normal

B7L5 = c1[1] & c2[4];


--B6L4 is and_mode:U5|out1[3]~83
--operation mode is normal

B6L4 = c1[2] & c2[3];


--B5L3 is and_mode:U4|out1[2]~75
--operation mode is normal

B5L3 = c2[2] & c1[3];


--c2[6] is c2[6]
--operation mode is normal

c2[6]_lut_out = multiplicand[6];
c2[6] = DFFEAS(c2[6]_lut_out, clock, VCC, , , , , , );


--B8L6 is and_mode:U7|out1[6]~85
--operation mode is normal

B8L6 = c1[0] & c2[6];


--B7L6 is and_mode:U6|out1[5]~78
--operation mode is normal

B7L6 = c1[1] & c2[5];


--B6L5 is and_mode:U5|out1[4]~84
--operation mode is normal

B6L5 = c1[2] & c2[4];


--B5L4 is and_mode:U4|out1[3]~76
--operation mode is normal

B5L4 = c2[3] & c1[3];


--B4L3 is and_mode:U3|out1[2]~82
--operation mode is normal

B4L3 = c1[4] & c2[2];


--B3L2 is and_mode:U2|out1[1]~74
--operation mode is normal

B3L2 = c2[1] & c1[5];


--c2[7] is c2[7]
--operation mode is normal

c2[7]_lut_out = multiplicand[7];
c2[7] = DFFEAS(c2[7]_lut_out, clock, VCC, , , , , , );


--B8L7 is and_mode:U7|out1[7]~86
--operation mode is normal

B8L7 = c1[0] & c2[7];


--B7L7 is and_mode:U6|out1[6]~79
--operation mode is normal

B7L7 = c1[1] & c2[6];


--B6L6 is and_mode:U5|out1[5]~85
--operation mode is normal

B6L6 = c1[2] & c2[5];


--B5L5 is and_mode:U4|out1[4]~77
--operation mode is normal

B5L5 = c1[3] & c2[4];


--B4L4 is and_mode:U3|out1[3]~83
--operation mode is normal

B4L4 = c1[4] & c2[3];


--B3L3 is and_mode:U2|out1[2]~75
--operation mode is normal

B3L3 = c1[5] & c2[2];


--B2L2 is and_mode:U1|out1[1]~81
--operation mode is normal

B2L2 = c2[1] & c1[6];


--c1[7] is c1[7]
--operation mode is normal

c1[7]_lut_out = multiplier[7];
c1[7] = DFFEAS(c1[7]_lut_out, clock, VCC, , , , , , );


--B1L1 is and_mode:U0|out1[0]~73
--operation mode is normal

B1L1 = c2[0] & c1[7];


--B6L7 is and_mode:U5|out1[6]~86
--operation mode is normal

B6L7 = c1[2] & c2[6];


--B5L6 is and_mode:U4|out1[5]~78
--operation mode is normal

B5L6 = c1[3] & c2[5];


--B4L5 is and_mode:U3|out1[4]~84
--operation mode is normal

B4L5 = c1[4] & c2[4];


--B3L4 is and_mode:U2|out1[3]~76
--operation mode is normal

B3L4 = c1[5] & c2[3];


--B2L3 is and_mode:U1|out1[2]~82
--operation mode is normal

B2L3 = c1[6] & c2[2];


--B1L2 is and_mode:U0|out1[1]~74
--operation mode is normal

B1L2 = c2[1] & c1[7];


--B6L8 is and_mode:U5|out1[7]~87
--operation mode is normal

B6L8 = c1[2] & c2[7];


--B5L7 is and_mode:U4|out1[6]~79
--operation mode is normal

B5L7 = c1[3] & c2[6];


--B4L6 is and_mode:U3|out1[5]~85
--operation mode is normal

B4L6 = c1[4] & c2[5];


--B3L5 is and_mode:U2|out1[4]~77
--operation mode is normal

B3L5 = c1[5] & c2[4];


--B2L4 is and_mode:U1|out1[3]~83
--operation mode is normal

B2L4 = c1[6] & c2[3];


--B1L3 is and_mode:U0|out1[2]~75
--operation mode is normal

B1L3 = c2[2] & c1[7];


--B4L7 is and_mode:U3|out1[6]~86
--operation mode is normal

B4L7 = c1[4] & c2[6];


--B3L6 is and_mode:U2|out1[5]~78
--operation mode is normal

B3L6 = c1[5] & c2[5];


--B2L5 is and_mode:U1|out1[4]~84
--operation mode is normal

B2L5 = c1[6] & c2[4];


--B1L4 is and_mode:U0|out1[3]~76
--operation mode is normal

B1L4 = c2[3] & c1[7];


--B4L8 is and_mode:U3|out1[7]~87
--operation mode is normal

B4L8 = c1[4] & c2[7];


--B3L7 is and_mode:U2|out1[6]~79
--operation mode is normal

B3L7 = c1[5] & c2[6];


--B2L6 is and_mode:U1|out1[5]~85
--operation mode is normal

B2L6 = c1[6] & c2[5];


--B1L5 is and_mode:U0|out1[4]~77
--operation mode is normal

B1L5 = c2[4] & c1[7];


--B2L7 is and_mode:U1|out1[6]~86
--operation mode is normal

B2L7 = c1[6] & c2[6];


--B1L6 is and_mode:U0|out1[5]~78
--operation mode is normal

B1L6 = c2[5] & c1[7];


--B2L8 is and_mode:U1|out1[7]~87
--operation mode is normal

B2L8 = c1[6] & c2[7];


--B1L7 is and_mode:U0|out1[6]~79
--operation mode is normal

B1L7 = c2[6] & c1[7];


--clock is clock
--operation mode is input

clock = INPUT();


--multiplicand[0] is multiplicand[0]
--operation mode is input

multiplicand[0] = INPUT();


--multiplier[0] is multiplier[0]
--operation mode is input

multiplier[0] = INPUT();


--multiplier[4] is multiplier[4]
--operation mode is input

multiplier[4] = INPUT();


--multiplicand[1] is multiplicand[1]
--operation mode is input

multiplicand[1] = INPUT();


--multiplier[1] is multiplier[1]
--operation mode is input

multiplier[1] = INPUT();


--multiplier[2] is multiplier[2]
--operation mode is input

multiplier[2] = INPUT();


--multiplier[5] is multiplier[5]
--operation mode is input

multiplier[5] = INPUT();


--multiplier[6] is multiplier[6]
--operation mode is input

multiplier[6] = INPUT();


--multiplicand[2] is multiplicand[2]
--operation mode is input

multiplicand[2] = INPUT();


--multiplicand[3] is multiplicand[3]
--operation mode is input

multiplicand[3] = INPUT();


--multiplier[3] is multiplier[3]
--operation mode is input

multiplier[3] = INPUT();


--multiplicand[4] is multiplicand[4]
--operation mode is input

multiplicand[4] = INPUT();


--multiplicand[5] is multiplicand[5]
--operation mode is input

multiplicand[5] = INPUT();


--multiplicand[6] is multiplicand[6]
--operation mode is input

multiplicand[6] = INPUT();


--multiplicand[7] is multiplicand[7]
--operation mode is input

multiplicand[7] = INPUT();


--multiplier[7] is multiplier[7]
--operation mode is input

multiplier[7] = INPUT();


--product[0] is product[0]
--operation mode is output

product[0] = OUTPUT(A1L04Q);


--product[1] is product[1]
--operation mode is output

product[1] = OUTPUT(A1L24Q);


--product[2] is product[2]
--operation mode is output

product[2] = OUTPUT(A1L44Q);


--product[3] is product[3]
--operation mode is output

product[3] = OUTPUT(A1L64Q);


--product[4] is product[4]
--operation mode is output

product[4] = OUTPUT(A1L94Q);


--product[5] is product[5]
--operation mode is output

product[5] = OUTPUT(A1L25Q);


--product[6] is product[6]
--operation mode is output

product[6] = OUTPUT(A1L55Q);


--product[7] is product[7]
--operation mode is output

product[7] = OUTPUT(A1L85Q);


--product[8] is product[8]
--operation mode is output

product[8] = OUTPUT(A1L16Q);


--product[9] is product[9]
--operation mode is output

product[9] = OUTPUT(A1L46Q);


--product[10] is product[10]
--operation mode is output

product[10] = OUTPUT(A1L76Q);


--product[11] is product[11]
--operation mode is output

product[11] = OUTPUT(A1L07Q);


--product[12] is product[12]
--operation mode is output

product[12] = OUTPUT(A1L37Q);


--product[13] is product[13]
--operation mode is output

product[13] = OUTPUT(A1L67Q);


--product[14] is product[14]
--operation mode is output

product[14] = OUTPUT(A1L97Q);


--product[15] is product[15]
--operation mode is output

product[15] = OUTPUT(A1L18Q);

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亚洲欧美第一页_禁久久精品乱码_粉嫩av一区二区三区免费野_久草精品视频
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