--lpm_add_sub DEVICE_FAMILY="MAX7000S" LPM_DIRECTION="SUB" LPM_WIDTH=1 cout dataa datab result
--VERSION_BEGIN 5.0 cbx_cycloneii 2004:12:20:14:28:52:SJ cbx_lpm_add_sub 2005:04:12:13:30:42:SJ cbx_mgl 2005:04:13:17:26:48:SJ cbx_stratix 2005:03:14:17:09:02:SJ cbx_stratixii 2004:12:22:13:27:12:SJ  VERSION_END


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--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
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--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
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--  applicable agreement for further details.



--synthesis_resources = 
SUBDESIGN add_sub_7b8
( 
	cout	:	output;
	dataa[0..0]	:	input;
	datab[0..0]	:	input;
	result[0..0]	:	output;
) 
VARIABLE 
	carry_eqn[0..0]	: WIRE;
	cin_wire	: WIRE;
	datab_node[0..0]	: WIRE;
	sum_eqn[0..0]	: WIRE;

BEGIN 
	carry_eqn[] = ( ((dataa[0..0] & datab_node[0..0]) # ((dataa[0..0] # datab_node[0..0]) & cin_wire)));
	cin_wire = B"1";
	cout = carry_eqn[0..0];
	datab_node[] = (! datab[]);
	result[] = sum_eqn[];
	sum_eqn[] = ( ((dataa[0..0] $ datab_node[0..0]) $ cin_wire));
END;
--VALID FILE