?? decoder.vhd
字號:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity decoder is
Port (din:in std_logic_vector(3 downto 0 ); --四位二進制碼輸入
dout:out std_logic_vector(3 downto 0) ); --輸出LED七段碼,顯示碼對應gfedcba
end decoder;
architecture Behavioral of decoder is
begin
process(din)
begin
case din is
when "0000" => dout<="0000";--0
when "0001" => dout<="0001";--1
when "0010" => dout<="0010";--2
when "0011" => dout<="0011";--3
when "0100" => dout<="0100"; --4
when "0101" => dout<="0101";--5
when "0110" => dout<="0110";--6
when "0111" => dout<="0111";--7
when "1000" => dout<="1000";--8
when "1001" => dout<="1001";--9
when others => dout<="0000";
end case;
end process;
end Behavioral;
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