library ieee;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_1164.all;
entity pword is
port (--pdip:  in  std_logic_vector(3 downto 0);
      pw :  out std_logic_vector(9 downto 0);
      clk_48Mhz:     in  std_logic;
      d        : in  std_logic;
      ps2_clk: in  std_logic;
      ps2_dat: in  std_logic;
      code:    buffer std_logic_vector(7 downto 0)  
          
      );
end pword;

architecture a of pword is
signal dat :    std_logic_vector(10 downto 0);
signal cnt :    std_logic_vector(3 downto 0);
signal clkcnt:  std_logic_vector(9 downto 0);
signal clkcnt2: std_logic_vector(9 downto 0);
signal check,old_clk,over:   std_logic;
signal pdip:    std_logic_vector(3 downto 0);
begin
  pw<=pdip & "000000";

process(clk_48Mhz,code)
begin
  if     code=X"45" and d='0' then
         pdip<="0000";
  elsif  code=X"16" and d='0' then
         pdip<="0001";
  elsif  code=X"1E" and d='0' then
         pdip<="0010";
  elsif  code=X"26" and d='0' then
         pdip<="0011";
  elsif  code=X"25" and d='0' then
         pdip<="0100";
  elsif  code=X"2E"  and d='0' then
         pdip<="0101";
   elsif code=X"36" and d='0' then
         pdip<="0110";
    elsif code=X"3D" and d='0' then
         pdip<="0111";
    elsif code=X"3E" and d='0' then
         pdip<="1000";
    elsif code=X"46" and d='0' then
         pdip<="1001";
  end if;
end process;



process(clk_48Mhz)
 begin
  if clk_48Mhz'event and clk_48Mhz='1' then
     clkcnt2 <= clkcnt2 + 1;
  end if;
 end process;

 process(clkcnt2(9))
 begin
  if clkcnt2(9)'event and clkcnt2(9)='1' then 
     old_clk <= ps2_clk; 
     if old_clk='1' and ps2_clk='0' and clkcnt="0000000000" then
        dat <= ps2_dat & dat(10 downto 1); 
        check <= check xor ps2_dat;
        cnt <= cnt + 1;
        if cnt=10  then
           over <= '1';     
           cnt <= "0000";
        end if;
     end if;
     if over='1'  then 
        if dat(0)='0' and dat(10)='1' and check='0' then
           code <= dat(8 downto 1);  
        end if;
        clkcnt<="1111111111";  
        over <= '0';
        check <= '0';  
     end if;
     if clkcnt > 0 then
        clkcnt <= clkcnt - 1; 
     end if;
  end if;
 end process;
end a;