--C1_CQI[6] is COUNTER:inst1|CQI[6] at LC_X15_Y14_N9
--operation mode is arithmetic

C1_CQI[6]_carry_eqn = (!C1L7 & C1L18) # (C1L7 & C1L19);
C1_CQI[6]_lut_out = C1_CQI[6] $ (!C1_CQI[6]_carry_eqn);
C1_CQI[6] = DFFEAS(C1_CQI[6]_lut_out, GLOBAL(C1L1), GLOBAL(CLR), , , , , , );

--C1L21 is COUNTER:inst1|CQI[6]~145 at LC_X15_Y14_N9
--operation mode is arithmetic

C1L21 = CARRY(C1_CQI[6] & (!C1L19));


--C1_CQI[7] is COUNTER:inst1|CQI[7] at LC_X15_Y13_N0
--operation mode is arithmetic

C1_CQI[7]_carry_eqn = C1L21;
C1_CQI[7]_lut_out = C1_CQI[7] $ C1_CQI[7]_carry_eqn;
C1_CQI[7] = DFFEAS(C1_CQI[7]_lut_out, GLOBAL(C1L1), GLOBAL(CLR), , , , , , );

--C1L23 is COUNTER:inst1|CQI[7]~149 at LC_X15_Y13_N0
--operation mode is arithmetic

C1L23_cout_0 = !C1L21 # !C1_CQI[7];
C1L23 = CARRY(C1L23_cout_0);

--C1L24 is COUNTER:inst1|CQI[7]~149COUT1_174 at LC_X15_Y13_N0
--operation mode is arithmetic

C1L24_cout_1 = !C1L21 # !C1_CQI[7];
C1L24 = CARRY(C1L24_cout_1);


--C1_CQI[8] is COUNTER:inst1|CQI[8] at LC_X15_Y13_N1
--operation mode is arithmetic

C1_CQI[8]_carry_eqn = (!C1L21 & C1L23) # (C1L21 & C1L24);
C1_CQI[8]_lut_out = C1_CQI[8] $ (!C1_CQI[8]_carry_eqn);
C1_CQI[8] = DFFEAS(C1_CQI[8]_lut_out, GLOBAL(C1L1), GLOBAL(CLR), , , , , , );

--C1L26 is COUNTER:inst1|CQI[8]~153 at LC_X15_Y13_N1
--operation mode is arithmetic

C1L26_cout_0 = C1_CQI[8] & (!C1L23);
C1L26 = CARRY(C1L26_cout_0);

--C1L27 is COUNTER:inst1|CQI[8]~153COUT1_175 at LC_X15_Y13_N1
--operation mode is arithmetic

C1L27_cout_1 = C1_CQI[8] & (!C1L24);
C1L27 = CARRY(C1L27_cout_1);


--C1_CQI[9] is COUNTER:inst1|CQI[9] at LC_X15_Y13_N2
--operation mode is arithmetic

C1_CQI[9]_carry_eqn = (!C1L21 & C1L26) # (C1L21 & C1L27);
C1_CQI[9]_lut_out = C1_CQI[9] $ (C1_CQI[9]_carry_eqn);
C1_CQI[9] = DFFEAS(C1_CQI[9]_lut_out, GLOBAL(C1L1), GLOBAL(CLR), , , , , , );

--C1L29 is COUNTER:inst1|CQI[9]~157 at LC_X15_Y13_N2
--operation mode is arithmetic

C1L29_cout_0 = !C1L26 # !C1_CQI[9];
C1L29 = CARRY(C1L29_cout_0);

--C1L30 is COUNTER:inst1|CQI[9]~157COUT1_176 at LC_X15_Y13_N2
--operation mode is arithmetic

C1L30_cout_1 = !C1L27 # !C1_CQI[9];
C1L30 = CARRY(C1L30_cout_1);


--C1_CQI[10] is COUNTER:inst1|CQI[10] at LC_X15_Y13_N3
--operation mode is arithmetic

C1_CQI[10]_carry_eqn = (!C1L21 & C1L29) # (C1L21 & C1L30);
C1_CQI[10]_lut_out = C1_CQI[10] $ !C1_CQI[10]_carry_eqn;
C1_CQI[10] = DFFEAS(C1_CQI[10]_lut_out, GLOBAL(C1L1), GLOBAL(CLR), , , , , , );

--C1L32 is COUNTER:inst1|CQI[10]~161 at LC_X15_Y13_N3
--operation mode is arithmetic

C1L32_cout_0 = C1_CQI[10] & !C1L29;
C1L32 = CARRY(C1L32_cout_0);

--C1L33 is COUNTER:inst1|CQI[10]~161COUT1_177 at LC_X15_Y13_N3
--operation mode is arithmetic

C1L33_cout_1 = C1_CQI[10] & !C1L30;
C1L33 = CARRY(C1L33_cout_1);


--C1_CQI[11] is COUNTER:inst1|CQI[11] at LC_X15_Y13_N4
--operation mode is arithmetic

C1_CQI[11]_carry_eqn = (!C1L21 & C1L32) # (C1L21 & C1L33);
C1_CQI[11]_lut_out = C1_CQI[11] $ C1_CQI[11]_carry_eqn;
C1_CQI[11] = DFFEAS(C1_CQI[11]_lut_out, GLOBAL(C1L1), GLOBAL(CLR), , , , , , );

--C1L35 is COUNTER:inst1|CQI[11]~165 at LC_X15_Y13_N4
--operation mode is arithmetic

C1L35 = CARRY(!C1L33 # !C1_CQI[11]);


--G1_w_anode242w[2] is soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode242w[2] at LC_X16_Y13_N1
--operation mode is normal

G1_w_anode242w[2] = C1_CQI[13] & (!C1_CQI[12] & WREN);


--G1L9 is soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode242w[2]~9 at LC_X16_Y13_N9
--operation mode is normal

G1L9 = C1_CQI[13] & (!C1_CQI[12]);


--G1_w_anode221w[2] is soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2] at LC_X16_Y13_N7
--operation mode is normal

G1_w_anode221w[2] = !C1_CQI[13] & (!C1_CQI[12] & WREN);


--G1L3 is soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode221w[2]~10 at LC_X16_Y13_N0
--operation mode is normal

G1L3 = !C1_CQI[13] & (!C1_CQI[12]);


--G1_w_anode250w[2] is soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode250w[2] at LC_X16_Y13_N6
--operation mode is normal

G1_w_anode250w[2] = C1_CQI[13] & (C1_CQI[12] & WREN);


--G1L12 is soundram:inst|altsyncram:altsyncram_component|altsyncram_i041:auto_generated|decode_iga:decode3|w_anode250w[2]~8 at LC_X16_Y13_N5
--operation mode is normal

G1L12 = C1_CQI[13] & (C1_CQI[12]);


--D1_datain[6] is ad0809:inst2|datain[6] at LC_X18_Y17_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

D1_datain[6]_lut_out = GND;
D1_datain[6] = DFFEAS(D1_datain[6]_lut_out, GLOBAL(D1_present_state.slock), VCC, , , D[6], , , VCC);


--D1_datain[5] is ad0809:inst2|datain[5] at LC_X18_Y9_N2
--operation mode is normal

D1_datain[5]_lut_out = D[5];
D1_datain[5] = DFFEAS(D1_datain[5]_lut_out, GLOBAL(D1_present_state.slock), VCC, , , , , , );


--D1_datain[4] is ad0809:inst2|datain[4] at LC_X21_Y19_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

D1_datain[4]_lut_out = GND;
D1_datain[4] = DFFEAS(D1_datain[4]_lut_out, GLOBAL(D1_present_state.slock), VCC, , , D[4], , , VCC);


--D1_datain[3] is ad0809:inst2|datain[3] at LC_X21_Y10_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

D1_datain[3]_lut_out = GND;
D1_datain[3] = DFFEAS(D1_datain[3]_lut_out, GLOBAL(D1_present_state.slock), VCC, , , D[3], , , VCC);


--D1_datain[2] is ad0809:inst2|datain[2] at LC_X18_Y13_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

D1_datain[2]_lut_out = GND;
D1_datain[2] = DFFEAS(D1_datain[2]_lut_out, GLOBAL(D1_present_state.slock), VCC, , , D[2], , , VCC);


--D1_datain[1] is ad0809:inst2|datain[1] at LC_X32_Y18_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

D1_datain[1]_lut_out = GND;
D1_datain[1] = DFFEAS(D1_datain[1]_lut_out, GLOBAL(D1_present_state.slock), VCC, , , D[1], , , VCC);


--D1_datain[0] is ad0809:inst2|datain[0] at LC_X29_Y18_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

D1_datain[0]_lut_out = GND;
D1_datain[0] = DFFEAS(D1_datain[0]_lut_out, GLOBAL(D1_present_state.slock), VCC, , , D[0], , , VCC);


--INT is INT at PIN_21
--operation mode is input

INT = INPUT();


--CLK is CLK at PIN_28
--operation mode is input

CLK = INPUT();


--CLR is CLR at PIN_44
--operation mode is input

CLR = INPUT();


--WREN is WREN at