{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version " "Info: Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Apr 29 15:05:50 2008 " "Info: Processing started: Tue Apr 29 15:05:50 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off ToneTaba -c ToneTaba " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ToneTaba -c ToneTaba" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "ToneTaba.vhd 2 1 " "Warning: Using design file ToneTaba.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ToneTaba-one " "Info: Found design unit 1: ToneTaba-one" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 ToneTaba " "Info: Found entity 1: ToneTaba" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 3 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "ToneTaba " "Info: Elaborating entity \"ToneTaba\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "Tone ToneTaba.vhd(11) " "Warning (10631): VHDL Process Statement warning at ToneTaba.vhd(11): inferring latch(es) for signal or variable \"Tone\", which holds its previous value in one or more paths through the process" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "CODE ToneTaba.vhd(11) " "Warning (10631): VHDL Process Statement warning at ToneTaba.vhd(11): inferring latch(es) for signal or variable \"CODE\", which holds its previous value in one or more paths through the process" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "HIGH ToneTaba.vhd(11) " "Warning (10631): VHDL Process Statement warning at ToneTaba.vhd(11): inferring latch(es) for signal or variable \"HIGH\", which holds its previous value in one or more paths through the process" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10631 "VHDL Process Statement warning at %2!s!: inferring latch(es) for signal or variable \"%1!s!\", which holds its previous value in one or more paths through the process" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "HIGH ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"HIGH\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "CODE\[0\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"CODE\[0\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "CODE\[1\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"CODE\[1\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "CODE\[2\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"CODE\[2\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "CODE\[3\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"CODE\[3\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[0\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[0\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[1\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[1\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[2\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[2\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[3\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[3\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[4\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[4\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[5\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[5\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[6\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[6\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[7\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[7\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}
{ "Info" "IVRFX_VRFC_LATCH_INFERRED" "Tone\[8\] ToneTaba.vhd(11) " "Info (10041): Verilog HDL or VHDL info at ToneTaba.vhd(11): inferred latch for \"Tone\[8\]\"" {  } { { "ToneTaba.vhd" "" { Text "D:/ToneTaba/ToneTaba.vhd" 11 0 0 } }  } 0 10041 "Verilog HDL or VHDL info at %2!s!: inferred latch for \"%1!s!\"" 0 0}