module SRAMtest(
				//Host side
				CLOCK_50,	//	50 MHz
				SW,
				LEDR,LEDG,KEY,
				HEX0,HEX1,HEX2,HEX3,
				//SRAM side
				SRAM_ADDR,
				SRAM_UB_N,
				SRAM_LB_N,
				SRAM_WE_N,
				SRAM_CE_N,
				SRAM_OE_N,
				SRAM_DQ
				);


input [3:0] KEY;	//寫數據控制，用KEY[0]，低電平有效
input CLOCK_50;		//	50 MHz
input [17:0] SW;	//低八位控制數據輸入，高10位控制地址輸入
output [6:0] HEX0,HEX1,HEX2,HEX3;//數據用七段數碼管顯示	
output [17:0] LEDR;	//地址低八位指示燈
output [7:0] LEDG;	//數據低八位指示燈

inout	[15:0]	SRAM_DQ;
output	[17:0]	SRAM_ADDR;
output			SRAM_UB_N,
				SRAM_LB_N,
				SRAM_WE_N,
				SRAM_CE_N,
				SRAM_OE_N;
			
wire	DLY_RST;//復位信號

reg		[15:0]	iDATA;
wire	[15:0]	oDATA;	
reg		[17:0]	iADDR;
reg			iWE_N,iOE_N;
wire			iCE_N,iCLK;
wire	[1:0]	iBE_N;

reg  [15:0] temp_DATA;	//七段數碼管顯示數據寄存器			
reg  [1:0] ST;			//狀態寄存器
reg [1:0] counter;		//分頻計數器

assign iCE_N=1'b0;			//選通信號
assign iBE_N=2'd0;			//高字節和低字節數據掩碼信號

assign LEDR[17:8]=SW[17:8];		//地址輸入
assign LEDG[7:0]=SW[7:0];		//數據輸入

always @(posedge CLOCK_50,negedge DLY_RST)
begin
if(!DLY_RST)//初始化
	begin
	iWE_N<=1;
	iOE_N<=0;
	iADDR<=0;
	iDATA<=0;
	ST<=0;
	counter<=0;
	end
else
begin
	case(ST)		//KEY[0]！=0時，狀態機處于讀數據狀態
	2'd0:			//write
		begin
			if(!KEY[0])				//KEY[0]=0時寫入
			begin
			iWE_N<=0;
			iADDR<={{8{1'b0}},SW[17:8]};
			iDATA<={{7{1'b0}},SW[7:0]};
			temp_DATA<=SRAM_DQ;
			ST<=1;
			end
			else
			 ST<=2;
		end
	2'd1:		//延時2個周期
		begin
		if(counter<2)
			counter<=counter+1;
		else
			begin
				counter<=0;
				ST<=2;
			end
		end
	2'd2,
	2'd3:	
		begin		//read
			iWE_N<=1;
			iOE_N<=0;
			iADDR<={{8{1'b0}},SW[17:8]};
			temp_DATA<=oDATA;
			ST<=0;
		end
	
	endcase
end
end

Reset_Delay			r0	(	.iCLK(CLOCK_50),.oRESET(DLY_RST)	);	//復位

SRAM_16Bit_512K the_SRAM_16Bit_512K	//SRAM controller
    (
      .SRAM_ADDR (SRAM_ADDR),
      .SRAM_CE_N (SRAM_CE_N),
      .SRAM_DQ   (SRAM_DQ),
      .SRAM_LB_N (SRAM_LB_N),
      .SRAM_OE_N (SRAM_OE_N),
      .SRAM_UB_N (SRAM_UB_N),
      .SRAM_WE_N (SRAM_WE_N),
      .iADDR     (iADDR),
      .iBE_N     (iBE_N),
      .iCE_N     (iCE_N),
      .iCLK      (iCLK),
      .iDATA     (iDATA),
      .iOE_N     (iOE_N),
      .iWE_N     (iWE_N),
      .oDATA     (oDATA)
    );
//數碼管顯示
SEG7_LUT_4 seg_4 (	.oSEG0(HEX0),.oSEG1(HEX1),.oSEG2(HEX2),.oSEG3(HEX3),
					.iDIG(temp_DATA),.iRESET(DLY_RST),.iCLK(CLOCK_50));
endmodule