?? waveform1.vwf

?? FPGA的SRAM存儲器的控制程序
?? VWF
?? 第 1 頁 / 共 4 頁
字號:
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|iDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iOE_N")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iWE_N")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 16;
	LSB_INDEX = 0;
	DIRECTION = BURIED;
	PARENT = "";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[15]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[14]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[13]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[12]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[11]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[10]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[9]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[8]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

SIGNAL("SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = BURIED;
	PARENT = "SRAM_16Bit_512K:the_SRAM_16Bit_512K|oDATA";
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[17]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[16]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[15]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_ADDR[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_CE_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[15]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_DQ[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_LB_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_OE_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_UB_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|SRAM_WE_N")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[17]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[16]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[15]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1000.0;
	}
}

TRANSITION_LIST("SRAM_16Bit_512K:the_SRAM_16Bit_512K|iADDR[11]")
{
	NODE
	{
		REPEAT = 1;
?? 文件大小 652 K
?? 上傳用戶 qingriwanxia
?? 所屬分類 VHDL/FPGA/Verilog
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#FPGA #SRAM #存儲器 #控制
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?? waveform1.vwf

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