Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
    Info: Processing started: Wed Dec 12 16:52:08 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off SRAMtest -c SRAMtest
Info: Found 1 design units, including 1 entities, in source file SEG7_LUT_4.v
    Info: Found entity 1: SEG7_LUT_4
Info: Found 1 design units, including 1 entities, in source file SEG7_LUT.v
    Info: Found entity 1: SEG7_LUT
Info: Found 1 design units, including 1 entities, in source file SRAM_16Bit_512K.v
    Info: Found entity 1: SRAM_16Bit_512K
Info: Found 1 design units, including 1 entities, in source file Reset_Delay.v
    Info: Found entity 1: Reset_Delay
Info: Found 1 design units, including 1 entities, in source file SRAMtest.v
    Info: Found entity 1: SRAMtest
Info: Elaborating entity "SRAMtest" for the top level hierarchy
Warning (10036): Verilog HDL or VHDL warning at SRAMtest.v(40): object "DATA_or_ADDR" assigned a value but never read
Warning (10036): Verilog HDL or VHDL warning at SRAMtest.v(47): object "iWE" assigned a value but never read
Warning (10230): Verilog HDL assignment warning at SRAMtest.v(54): truncated value with size 19 to match size of target (18)
Warning (10230): Verilog HDL assignment warning at SRAMtest.v(55): truncated value with size 16 to match size of target (1)
Warning (10230): Verilog HDL assignment warning at SRAMtest.v(56): truncated value with size 19 to match size of target (18)
Info: Elaborating entity "Reset_Delay" for hierarchy "Reset_Delay:r0"
Warning (10230): Verilog HDL assignment warning at Reset_Delay.v(11): truncated value with size 32 to match size of target (20)
Info: Elaborating entity "SRAM_16Bit_512K" for hierarchy "SRAM_16Bit_512K:the_SRAM_16Bit_512K"
Info: Elaborating entity "SEG7_LUT_4" for hierarchy "SEG7_LUT_4:seg_4"
Info: Elaborating entity "SEG7_LUT" for hierarchy "SEG7_LUT_4:seg_4|SEG7_LUT:u0"
Warning: Port "iDIG" on the entity instantiation of "seg_4" is connected to a signal of width 1. The formal width of the signal in the module is 16.  Extra bits will be driven by GND.
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[14]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[13]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[12]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[11]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[10]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[9]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[8]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[6]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[5]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[4]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[2]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[1]" with stuck data_in port to stuck value GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[15]" with stuck data_in port to stuck value GND
Info: One or more bidirs are fed by always-enabled (GND-fed) open-drain buffers
    Info: Fan-out of permanently enabled (GND-fed) open-drain buffer feeding bidir "SRAM_DQ[0]" is set to GND
Warning: Reduced register "SEG7_LUT_4:seg_4|temp_DIG[0]" with stuck data_in port to stuck value GND
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "HEX0[0]" stuck at GND
    Warning: Pin "HEX0[1]" stuck at GND
    Warning: Pin "HEX0[2]" stuck at GND
    Warning: Pin "HEX0[3]" stuck at GND
    Warning: Pin "HEX0[4]" stuck at GND
    Warning: Pin "HEX0[5]" stuck at GND
    Warning: Pin "HEX0[6]" stuck at VCC
    Warning: Pin "HEX1[0]" stuck at GND
    Warning: Pin "HEX1[1]" stuck at GND
    Warning: Pin "HEX1[2]" stuck at GND
    Warning: Pin "HEX1[3]" stuck at GND
    Warning: Pin "HEX1[4]" stuck at GND
    Warning: Pin "HEX1[5]" stuck at GND
    Warning: Pin "HEX1[6]" stuck at VCC
    Warning: Pin "HEX2[0]" stuck at GND
    Warning: Pin "HEX2[1]" stuck at GND
    Warning: Pin "HEX2[2]" stuck at GND
    Warning: Pin "HEX2[3]" stuck at GND
    Warning: Pin "HEX2[4]" stuck at GND
    Warning: Pin "HEX2[5]" stuck at GND
    Warning: Pin "HEX2[6]" stuck at VCC
    Warning: Pin "HEX3[0]" stuck at GND
    Warning: Pin "HEX3[1]" stuck at GND
    Warning: Pin "HEX3[2]" stuck at GND
    Warning: Pin "HEX3[3]" stuck at GND
    Warning: Pin "HEX3[4]" stuck at GND
    Warning: Pin "HEX3[5]" stuck at GND
    Warning: Pin "HEX3[6]" stuck at VCC
    Warning: Pin "SRAM_UB_N" stuck at GND
    Warning: Pin "SRAM_LB_N" stuck at GND
    Warning: Pin "SRAM_WE_N" stuck at GND
    Warning: Pin "SRAM_CE_N" stuck at GND
    Warning: Pin "SRAM_OE_N" stuck at GND
Info: 21 registers lost all their fanouts during netlist optimizations. The first 21 are displayed below.
    Info: Register "r0/oRESET" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[0]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[1]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[2]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[3]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[4]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[5]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[6]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[7]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[8]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[9]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[10]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[11]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[12]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[13]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[14]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[15]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[16]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[17]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[18]" lost all its fanouts during netlist optimizations.
    Info: Register "r0/Cont[19]" lost all its fanouts during netlist optimizations.
Info: Implemented 123 device resources after synthesis - the final resource count might be different
    Info: Implemented 20 input pins
    Info: Implemented 69 output pins
    Info: Implemented 32 bidirectional pins
    Info: Implemented 2 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 57 warnings
    Info: Allocated 127 megabytes of memory during processing
    Info: Processing ended: Wed Dec 12 16:52:10 2007
    Info: Elapsed time: 00:00:02