(DELAYFILE  (SDFVERSION "2.1")  (DESIGN "gate_clock")  (DATE "Tue Jan  6 18:51:24 1998")  (VENDOR "Xilinx")  (PROGRAM "Xilinx VERILOG SDF writer")  (VERSION "M1.4.12")  (DIVIDER /)  (VOLTAGE 5.00:5.00:5.00)  (PROCESS)  (TEMPERATURE 25.00:25.00:25.00)  (TIMESCALE 1ps)  (CELL    (CELLTYPE "X_BUF")    (INSTANCE U33)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (2050:2050:2050) (2050:2050:2050))      )    )  )  (CELL    (CELLTYPE "X_BUF")    (INSTANCE U35)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (2050:2050:2050) (2050:2050:2050))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE OUT1_reg)    (DELAY      (ABSOLUTE        (PORT IN  (3060:3060:3060) (3060:3060:3060))        (PORT CLK  (866:866:866) (866:866:866))        (IOPATH CLK OUT  (2820:2820:2820) (2820:2820:2820))        (PORT CE  (3677:3677:3677) (3677:3677:3677))        (IOPATH SET OUT  (2820:2820:2820) (2820:2820:2820))        (IOPATH RST OUT  (2820:2820:2820) (2820:2820:2820))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U39)    (DELAY      (ABSOLUTE        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_OR2")    (INSTANCE OUT1_reg_GSR_OR_27)    (DELAY      (ABSOLUTE        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_BUF")    (INSTANCE U36\/\$1I20)    (DELAY      (ABSOLUTE        (PORT IN  (1477:1477:1477) (1477:1477:1477))        (IOPATH IN OUT  (7300:7300:7300) (7300:7300:7300))      )    )  )  (CELL    (CELLTYPE "X_TRI")    (INSTANCE U36\/\$1I20_GTS_TRI_28)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (0:0:0) (0:0:0))        (IOPATH CTL OUT ( )  ( )  (0:0:0) (0:0:0) (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_CKBUF")    (INSTANCE U31\/clkbuf)    (DELAY      (ABSOLUTE        (PORT IN  (2720:2720:2720) (2720:2720:2720))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_BUF")    (INSTANCE U31\/clkio_buf)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_CKBUF")    (INSTANCE U32\/clkbuf)    (DELAY      (ABSOLUTE        (PORT IN  (2720:2720:2720) (2720:2720:2720))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_BUF")    (INSTANCE U32\/clkio_buf)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_CKBUF")    (INSTANCE U34\/clkbuf)    (DELAY      (ABSOLUTE        (PORT IN  (2720:2720:2720) (2720:2720:2720))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_BUF")    (INSTANCE U34\/clkio_buf)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U37\/n_1\/2_0)    (DELAY      (ABSOLUTE        (PORT IN0  (3336:3336:3336) (3336:3336:3336))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (1245:1245:1245) (1245:1245:1245))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U37\/n_1)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))        (PORT IN1  (1235:1235:1235) (1235:1235:1235))        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))      )    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U36\/\$1I20_GTS_TRI_2_INV_29)    (DELAY      (ABSOLUTE        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  ))