(IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (2860:2860:2860) (2860:2860:2860))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U295)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))        (PORT IN1  (6189:6189:6189) (6189:6189:6189))        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE I_1\/CLREVENT_reg)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (PORT CLK  (1225:1225:1225) (1225:1225:1225))        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))        (PORT CE  (3665:3665:3665) (3665:3665:3665))        (IOPATH SET OUT  (0:0:0) (0:0:0))        (PORT RST  (0:0:0) (0:0:0))        (IOPATH RST OUT  (0:0:0) (0:0:0))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP RST (posedge CLK) (0:0:0))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U296)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U297)    (DELAY      (ABSOLUTE        (PORT IN  (1277:1277:1277) (1277:1277:1277))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_OR2")    (INSTANCE U298)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (1559:1559:1559) (1559:1559:1559))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U299)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (3037:3037:3037) (3037:3037:3037))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U300)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))        (PORT IN1  (5842:5842:5842) (5842:5842:5842))        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))      )    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U301)    (DELAY      (ABSOLUTE        (PORT IN  (2649:2649:2649) (2649:2649:2649))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_OR2")    (INSTANCE U302)    (DELAY      (ABSOLUTE        (PORT IN0  (1574:1574:1574) (1574:1574:1574))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (0:0:0) (0:0:0))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE I_1\/ZCNT_reg\<0\>)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (PORT CLK  (1212:1212:1212) (1212:1212:1212))        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))        (PORT CE  (4609:4609:4609) (4609:4609:4609))        (IOPATH SET OUT  (0:0:0) (0:0:0))        (PORT RST  (0:0:0) (0:0:0))        (IOPATH RST OUT  (0:0:0) (0:0:0))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP RST (posedge CLK) (0:0:0))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U304)    (DELAY      (ABSOLUTE        (PORT IN  (2345:2345:2345) (2345:2345:2345))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_OR2")    (INSTANCE U305)    (DELAY      (ABSOLUTE        (PORT IN0  (2094:2094:2094) (2094:2094:2094))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (0:0:0) (0:0:0))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U308)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))        (PORT IN1  (6189:6189:6189) (6189:6189:6189))        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE I_0\/ZCNT_reg\<0\>)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (PORT CLK  (1225:1225:1225) (1225:1225:1225))        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))        (PORT CE  (4450:4450:4450) (4450:4450:4450))        (IOPATH SET OUT  (0:0:0) (0:0:0))        (PORT RST  (0:0:0) (0:0:0))        (IOPATH RST OUT  (0:0:0) (0:0:0))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP RST (posedge CLK) (0:0:0))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U309)    (DELAY      (ABSOLUTE        (PORT IN  (1693:1693:1693) (1693:1693:1693))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_OR2")    (INSTANCE U310)    (DELAY      (ABSOLUTE        (PORT IN0  (1444:1444:1444) (1444:1444:1444))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (0:0:0) (0:0:0))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U312)    (DELAY      (ABSOLUTE        (PORT IN0  (4753:4753:4753) (4753:4753:4753))        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))        (PORT IN1  (3547:3547:3547) (3547:3547:3547))        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE I_0\/ECNT_reg\<0\>)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (PORT CLK  (1206:1206:1206) (1206:1206:1206))        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))        (PORT CE  (4011:4011:4011) (4011:4011:4011))        (IOPATH SET OUT  (0:0:0) (0:0:0))        (PORT RST  (0:0:0) (0:0:0))        (IOPATH RST OUT  (0:0:0) (0:0:0))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP RST (posedge CLK) (0:0:0))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U313)    (DELAY      (ABSOLUTE        (PORT IN  (1566:1566:1566) (1566:1566:1566))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_OR2")    (INSTANCE U314)    (DELAY      (ABSOLUTE        (PORT IN0  (2196:2196:2196) (2196:2196:2196))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (0:0:0) (0:0:0))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U316)    (DELAY      (ABSOLUTE        (PORT IN0  (5728:5728:5728) (5728:5728:5728))        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))        (PORT IN1  (3587:3587:3587) (3587:3587:3587))        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE I_1\/ECNT_reg\<0\>)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (PORT CLK  (1231:1231:1231) (1231:1231:1231))        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))        (PORT CE  (3688:3688:3688) (3688:3688:3688))        (IOPATH SET OUT  (0:0:0) (0:0:0))        (PORT RST  (0:0:0) (0:0:0))        (IOPATH RST OUT  (0:0:0) (0:0:0))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP RST (posedge CLK) (0:0:0))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_XOR2")    (INSTANCE U317)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (1156:1156:1156) (1156:1156:1156))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U318)    (DELAY      (ABSOLUTE        (PORT IN0  (1094:1094:1094) (1094:1094:1094))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (1496:1496:1496) (1496:1496:1496))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U319)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))        (PORT IN1  (1667:1667:1667) (1667:1667:1667))        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))      )    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U320)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_OR2")    (INSTANCE U321)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (3099:3099:3099) (3099:3099:3099))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U322)    (DELAY      (ABSOLUTE        (PORT IN0  (1653:1653:1653) (1653:1653:1653))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (1394:1394:1394) (1394:1394:1394))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U323)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))        (PORT IN1  (3497:3497:3497) (3497:3497:3497))        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE I_0\/E2RQ_reg)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (PORT CLK  (1212:1212:1212) (1212:1212:1212))        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))        (PORT CE  (4113:4113:4113) (4113:4113:4113))        (IOPATH SET OUT  (0:0:0) (0:0:0))        (PORT RST  (0:0:0) (0:0:0))        (IOPATH RST OUT  (0:0:0) (0:0:0))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP RST (posedge CLK) (0:0:0))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U325)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (1600:1600:1600) (1600:1600:1600))        (PORT IN1  (1260:1260:1260) (1260:1260:1260))        (IOPATH IN1 OUT  (1600:1600:1600) (1600:1600:1600))      )    )  )  (CELL    (CELLTYPE "X_XOR2")    (INSTANCE U326)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (1353:1353:1353) (1353:1353:1353))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U327)    (DELAY      (ABSOLUTE        (PORT IN0  (1326:1326:1326) (1326:1326:1326))        (IOPATH IN0 OUT  (0:0:0) (0:0:0))        (PORT IN1  (1466:1466:1466) (1466:1466:1466))        (IOPATH IN1 OUT  (0:0:0) (0:0:0))      )    )  )  (CELL    (CELLTYPE "X_AND2")    (INSTANCE U328)    (DELAY      (ABSOLUTE        (PORT IN0  (0:0:0) (0:0:0))        (IOPATH IN0 OUT  (2420:2420:2420) (2420:2420:2420))        (PORT IN1  (1370:1370:1370) (1370:1370:1370))        (IOPATH IN1 OUT  (2420:2420:2420) (2420:2420:2420))      )    )  )  (CELL    (CELLTYPE "X_FF")    (INSTANCE I_1\/ECNT_reg\<2\>)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (PORT CLK  (1231:1231:1231) (1231:1231:1231))        (IOPATH CLK OUT  (2820:2820:2820) (0:0:0))        (PORT CE  (3688:3688:3688) (3688:3688:3688))        (IOPATH SET OUT  (0:0:0) (0:0:0))        (PORT RST  (0:0:0) (0:0:0))        (IOPATH RST OUT  (0:0:0) (0:0:0))      )    )    (TIMINGCHECK      (WIDTH (posedge CLK)  (4000:4000:4000))      (WIDTH (negedge CLK)  (4000:4000:4000))      (SETUP RST (posedge CLK) (0:0:0))      (SETUP CE (posedge CLK) (0:0:0))      (SETUP IN (posedge CLK) (0:0:0))      (HOLD CE (posedge CLK) (0:0:0))      (HOLD IN (posedge CLK) (0:0:0))      (HOLD RST (posedge CLK) (0:0:0))      (WIDTH (posedge RST)  (4000:4000:4000))    )  )  (CELL    (CELLTYPE "X_INV")    (INSTANCE U329)    (DELAY      (ABSOLUTE        (PORT IN  (0:0:0) (0:0:0))        (IOPATH IN OUT  (0:0:0) (0:0:0))      )    )  )