?? time_sim.sdf
字號(hào):
(PORT CLK (1235:1235:1235) (1235:1235:1235)) (IOPATH CLK O (2820:2820:2820) (0:0:0)) (PORT CE (3610:3610:3610) (3610:3610:3610)) (IOPATH SET O (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST O (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (RECOVERY (negedge RST) (posedge CLK) (0:0:0)) (SETUP (posedge CE) (posedge CLK) (0:0:0)) (SETUP (negedge CE) (posedge CLK) (0:0:0)) (SETUP (posedge I) (posedge CLK) (0:0:0)) (SETUP (negedge I) (posedge CLK) (0:0:0)) (HOLD (negedge I) (posedge CLK) (0:0:0)) (HOLD (posedge CE) (posedge CLK) (0:0:0)) (HOLD (negedge RST) (posedge CLK) (0:0:0)) (HOLD (negedge CE) (posedge CLK) (0:0:0)) (HOLD (posedge I) (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000)) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U254) (DELAY (ABSOLUTE (PORT I (0:0:0) (0:0:0)) (IOPATH I O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U255) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1228:1228:1228) (1228:1228:1228)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U256) (DELAY (ABSOLUTE (PORT I0 (1317:1317:1317) (1317:1317:1317)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1984:1984:1984) (1984:1984:1984)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U257) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (1600:1600:1600) (1600:1600:1600)) (PORT I1 (2337:2337:2337) (2337:2337:2337)) (IOPATH I1 O (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U258) (DELAY (ABSOLUTE (PORT I (1624:1624:1624) (1624:1624:1624)) (IOPATH I O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U259) (DELAY (ABSOLUTE (PORT I0 (1422:1422:1422) (1422:1422:1422)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (0:0:0) (0:0:0)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U260) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (1600:1600:1600) (1600:1600:1600)) (PORT I1 (1770:1770:1770) (1770:1770:1770)) (IOPATH I1 O (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE I_1_E2RQ_REG) (DELAY (ABSOLUTE (PORT I (820:820:820) (820:820:820)) (PORT CLK (1266:1266:1266) (1266:1266:1266)) (IOPATH CLK O (2820:2820:2820) (0:0:0)) (PORT CE (3610:3610:3610) (3610:3610:3610)) (IOPATH SET O (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST O (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (RECOVERY (negedge RST) (posedge CLK) (0:0:0)) (SETUP (posedge CE) (posedge CLK) (0:0:0)) (SETUP (negedge CE) (posedge CLK) (0:0:0)) (SETUP (posedge I) (posedge CLK) (0:0:0)) (SETUP (negedge I) (posedge CLK) (0:0:0)) (HOLD (negedge RST) (posedge CLK) (0:0:0)) (HOLD (posedge I) (posedge CLK) (0:0:0)) (HOLD (posedge CE) (posedge CLK) (0:0:0)) (HOLD (negedge I) (posedge CLK) (0:0:0)) (HOLD (negedge CE) (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000)) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U261) (DELAY (ABSOLUTE (PORT I (1489:1489:1489) (1489:1489:1489)) (IOPATH I O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U263) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (1600:1600:1600) (1600:1600:1600)) (PORT I1 (1041:1041:1041) (1041:1041:1041)) (IOPATH I1 O (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U265) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (1600:1600:1600) (1600:1600:1600)) (PORT I1 (1426:1426:1426) (1426:1426:1426)) (IOPATH I1 O (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U266) (DELAY (ABSOLUTE (PORT I (0:0:0) (0:0:0)) (IOPATH I O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U267) (DELAY (ABSOLUTE (PORT I0 (1606:1606:1606) (1606:1606:1606)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1212:1212:1212) (1212:1212:1212)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_XOR2") (INSTANCE U268) (DELAY (ABSOLUTE (PORT I0 (1297:1297:1297) (1297:1297:1297)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (0:0:0) (0:0:0)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U269) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (2420:2420:2420) (2420:2420:2420)) (PORT I1 (1747:1747:1747) (1747:1747:1747)) (IOPATH I1 O (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U270) (DELAY (ABSOLUTE (PORT I0 (1035:1035:1035) (1035:1035:1035)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (2227:2227:2227) (2227:2227:2227)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE I_0_ECNT_REG_4_Q) (DELAY (ABSOLUTE (PORT I (0:0:0) (0:0:0)) (PORT CLK (1235:1235:1235) (1235:1235:1235)) (IOPATH CLK O (2820:2820:2820) (0:0:0)) (PORT CE (4269:4269:4269) (4269:4269:4269)) (IOPATH SET O (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST O (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (RECOVERY (negedge RST) (posedge CLK) (0:0:0)) (SETUP (posedge CE) (posedge CLK) (0:0:0)) (SETUP (negedge CE) (posedge CLK) (0:0:0)) (SETUP (posedge I) (posedge CLK) (0:0:0)) (SETUP (negedge I) (posedge CLK) (0:0:0)) (HOLD (posedge CE) (posedge CLK) (0:0:0)) (HOLD (negedge CE) (posedge CLK) (0:0:0)) (HOLD (negedge I) (posedge CLK) (0:0:0)) (HOLD (posedge I) (posedge CLK) (0:0:0)) (HOLD (negedge RST) (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000)) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U272) (DELAY (ABSOLUTE (PORT I (1328:1328:1328) (1328:1328:1328)) (IOPATH I O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U273) (DELAY (ABSOLUTE (PORT I0 (1096:1096:1096) (1096:1096:1096)) (IOPATH I0 O (2420:2420:2420) (2420:2420:2420)) (PORT I1 (0:0:0) (0:0:0)) (IOPATH I1 O (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_XOR2") (INSTANCE U274) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1046:1046:1046) (1046:1046:1046)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U275) (DELAY (ABSOLUTE (PORT I0 (1096:1096:1096) (1096:1096:1096)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1228:1228:1228) (1228:1228:1228)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U276) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (2420:2420:2420) (2420:2420:2420)) (PORT I1 (1214:1214:1214) (1214:1214:1214)) (IOPATH I1 O (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE I_0_DCNT_REG_2_Q) (DELAY (ABSOLUTE (PORT I (0:0:0) (0:0:0)) (PORT CLK (1241:1241:1241) (1241:1241:1241)) (IOPATH CLK O (2820:2820:2820) (0:0:0)) (PORT CE (3813:3813:3813) (3813:3813:3813)) (IOPATH SET O (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST O (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (RECOVERY (negedge RST) (posedge CLK) (0:0:0)) (SETUP (posedge CE) (posedge CLK) (0:0:0)) (SETUP (negedge CE) (posedge CLK) (0:0:0)) (SETUP (posedge I) (posedge CLK) (0:0:0)) (SETUP (negedge I) (posedge CLK) (0:0:0)) (HOLD (negedge CE) (posedge CLK) (0:0:0)) (HOLD (posedge I) (posedge CLK) (0:0:0)) (HOLD (posedge CE) (posedge CLK) (0:0:0)) (HOLD (negedge RST) (posedge CLK) (0:0:0)) (HOLD (negedge I) (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000)) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE I_0_DCNT_REG_0_Q) (DELAY (ABSOLUTE (PORT I (0:0:0) (0:0:0)) (PORT CLK (1241:1241:1241) (1241:1241:1241)) (IOPATH CLK O (2820:2820:2820) (0:0:0)) (PORT CE (3813:3813:3813) (3813:3813:3813)) (IOPATH SET O (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST O (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (RECOVERY (negedge RST) (posedge CLK) (0:0:0)) (SETUP (posedge CE) (posedge CLK) (0:0:0)) (SETUP (negedge CE) (posedge CLK) (0:0:0)) (SETUP (posedge I) (posedge CLK) (0:0:0)) (SETUP (negedge I) (posedge CLK) (0:0:0)) (HOLD (posedge CE) (posedge CLK) (0:0:0)) (HOLD (negedge I) (posedge CLK) (0:0:0)) (HOLD (negedge RST) (posedge CLK) (0:0:0)) (HOLD (posedge I) (posedge CLK) (0:0:0)) (HOLD (negedge CE) (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000)) ) ) (CELL (CELLTYPE "X_XOR2") (INSTANCE U277) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1263:1263:1263) (1263:1263:1263)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U278) (DELAY (ABSOLUTE (PORT I0 (1375:1375:1375) (1375:1375:1375)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1349:1349:1349) (1349:1349:1349)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U279) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (2420:2420:2420) (2420:2420:2420)) (PORT I1 (2006:2006:2006) (2006:2006:2006)) (IOPATH I1 O (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_XOR2") (INSTANCE U280) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (0:0:0) (0:0:0)) (PORT I1 (1069:1069:1069) (1069:1069:1069)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U281) (DELAY (ABSOLUTE (PORT I0 (1317:1317:1317) (1317:1317:1317)) (IOPATH I0 O (0:0:0) (0:0:0)) (IOPATH I1 O (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U282) (DELAY (ABSOLUTE (PORT I0 (0:0:0) (0:0:0)) (IOPATH I0 O (2420:2420:2420) (2420:2420:2420)) (PORT I1 (2467:2467:2467) (2467:2467:2467)) (IOPATH I1 O (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE I_0_ZCNT_REG_6_Q) (DELAY (ABSOLUTE (PORT I (0:0:0) (0:0:0)) (PORT CLK (1247:1247:1247) (1247:1247:1247)) (IOPATH CLK O (2820:2820:2820) (0:0:0)) (PORT CE (4264:4264:4264) (4264:4264:4264)) (IOPATH SET O (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST O (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (RECOVERY (negedge RST) (posedge CLK) (0:0:0)) (SETUP (posedge CE) (posedge CLK) (0:0:0)) (SETUP (negedge CE) (posedge CLK) (0:0:0)) (SETUP (posedge I) (posedge CLK) (0:0:0)) (SETUP (negedge I) (posedge CLK) (0:0:0)) (HOLD (negedge CE) (posedge CLK) (0:0:0)) (HOLD (negedge RST) (posedge CLK) (0:0:0)) (HOLD (posedge I) (posedge CLK) (0:0:0)) (HOLD (negedge I) (posedge CLK) (0:0:0)) (HOLD (posedge CE) (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000)) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE I_0_ZCNT_REG_4_Q) (DELAY?? 快捷鍵說明
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