// Xilinx Verilog produced by program ngd2ver, Version M1.4.12// Date: Tue Jan  6 19:58:04 1998// Design file: time_sim.nga// Device: 4005epc84-2`timescale 1 ns/1 ps`uselib dir=/home/zeppelin2/tech_apps/m1_4.12/verilog/data libext=.vmd  module barrel (S, A_P, B_P);    input [3:0] S;    input [15:0] A_P;    output [15:0] B_P;    wire n101, n102, n103, n104, n105, n106, n107, n108, n109, n110, n111, n112    , n113, n114, n115, n116, n117, n118, n119, n120, n575, n576, n577, n578,     n579, n580, n581, n582, n583, n584, n585, n586, n587, n588, n589, n590, n315    , n316, n309, n247, n311, n248, n310, n312, n245, n313, n246, n314, n323,     n324, n317, n255, n318, n256, n319, n320, n253, n322, n254, n321, n331, n332    , n325, n251, n326, n252, n327, n328, n249, n330, n250, n329, n340, n341,     n333, n335, n334, n337, n336, n339, n338, n349, n350, n342, n243, n344, n244    , n343, n346, n345, n348, n242, n347, n241, n358, n359, n351, n353, n352,     n355, n354, n357, n356, n367, n368, n360, n362, n361, n364, n363, n366, n365    , n375, n376, n369, n371, n370, n372, n373, n374, n383, n384, n377, n379,     n378, n380, n381, n382, n392, n391, n385, n386, n387, n388, n390, n389, n401    , n400, n393, n395, n394, n397, n396, n399, n398, n409, n410, n403, n402,     n405, n404, n406, n408, n407, n418, n419, n412, n411, n414, n413, n415, n417    , n416, n427, n426, n420, n421, n422, n423, n425, n424, n434, n435, n428,     n429, n430, n431, n433, n432, n443, n442, n436, n438, n437, n439, n440, n441    , n450, n451, n444, n445, n446, n447, n449, n448, n459, n460, n453, n452,     n455, n454, n456, n458, n457, n469, n468, n461, n463, n462, n464, n465, n467    , n466, n477, n476, n470, n472, n471, n473, n474, n475, n485, n484, n478,     n480, n479, n481, n482, n483, n492, n493, n486, n487, n488, n489, n491, n490    , n500, n501, n494, n495, n496, n497, n499, n498, n509, n508, n502, n504,     n503, n505, n506, n507, n516, n517, n510, n511, n512, n513, n515, n514, n525    , n524, n518, n520, n519, n521, n522, n523, n532, n533, n526, n527, n528,     n529, n531, n530, n541, n540, n534, n536, n535, n537, n538, n539, n549, n550    , n542, n544, n543, n545, n546, n548, n547, n557, n558, n551, n552, n553,     n554, n556, n555, n565, n566, n559, n560, n561, n562, n564, n563, n574, n573    , n567, n569, n568, n570, n571, n572, \U238/$1I20_GTS_TRI ,     \U239/$1I20_GTS_TRI , \U240/$1I20_GTS_TRI , \U241/$1I20_GTS_TRI ,     \U242/$1I20_GTS_TRI , \U243/$1I20_GTS_TRI , \U244/$1I20_GTS_TRI ,     \U245/$1I20_GTS_TRI , \U246/$1I20_GTS_TRI , \U247/$1I20_GTS_TRI ,     \U248/$1I20_GTS_TRI , \U249/$1I20_GTS_TRI , \U250/$1I20_GTS_TRI ,     \U251/$1I20_GTS_TRI , \U252/$1I20_GTS_TRI , \U253/$1I20_GTS_TRI , \U258/2_0     , \U262/2_0 , \U267/2_0 , \U271/2_0 , \U276/2_0 , \U280/2_0 , \U283/2_0 ,     \U284/2_0 , \U288/2_0 , \U289/2_0 , \U293/2_0 , \U294/2_0 , \U298/2_0 ,     \U299/2_0 , \U303/2_0 , \U304/2_0 , \U308/2_0 , \U309/2_0 , \U313/2_0 ,     \U314/2_0 , \U318/2_0 , \U319/2_0 , \U325/2_0 , \U329/2_0 , \U334/2_0 ,     \U338/2_0 , \U343/2_0 , \U347/2_0 , \U350/2_0 , \U351/2_0 , \U355/2_0 ,     \U356/2_0 , \U361/2_0 , \U362/2_0 , \U365/2_0 , \U366/2_0 , \U371/2_0 ,     \U372/2_0 , \U375/2_0 , \U376/2_0 , \U382/2_0 , \U386/2_0 , \U391/2_0 ,     \U395/2_0 , \U400/2_0 , \U404/2_0 , \U409/2_0 , \U413/2_0 , \U417/2_0 ,     \U418/2_0 , \U421/2_0 , \U422/2_0 , \U426/2_0 , \U427/2_0 , \U431/2_0 ,     \U432/2_0 , \U438/2_0 , \U442/2_0 , \U447/2_0 , \U451/2_0 , \U456/2_0 ,     \U460/2_0 , \U465/2_0 , \U469/2_0 , \U474/2_0 , \U478/2_0 , \U483/2_0 ,     \U487/2_0 , \U492/2_0 , \U496/2_0 , \U501/2_0 , \U505/2_0 , \U510/2_0 ,     \U514/2_0 , \U517/2_0 , \U518/2_0 , \U522/2_0 , \U523/2_0 , \U529/2_0 ,     \U533/2_0 , \U538/2_0 , \U542/2_0 , \U547/2_0 , \U551/2_0 , U256_2_INV,     U261_2_INV, U266_2_INV, U269_2_INV, U275_2_INV, U278_2_INV, U285_2_INV,     U290_2_INV, U295_2_INV, U300_2_INV, U305_2_INV, U310_2_INV, U315_2_INV,     U320_2_INV, U323_2_INV, U328_2_INV, U332_2_INV, U337_2_INV, U342_2_INV,     U345_2_INV, U352_2_INV, U357_2_INV, U363_2_INV, U367_2_INV, U373_2_INV,     U377_2_INV, U378_2_INV, U380_2_INV, U381_2_INV, U384_2_INV, U387_2_INV,     U389_2_INV, U390_2_INV, U393_2_INV, U396_2_INV, U398_2_INV, U402_2_INV,     U403_2_INV, U405_2_INV, U407_2_INV, U408_2_INV, U411_2_INV, U419_2_INV,     U423_2_INV, U424_2_INV, U428_2_INV, U433_2_INV, U434_2_INV, U436_2_INV,     U440_2_INV, U441_2_INV, U443_2_INV, U445_2_INV, U449_2_INV, U450_2_INV,     U452_2_INV, U454_2_INV, U455_2_INV, U458_2_INV, U464_2_INV, U467_2_INV,     U470_2_INV, U472_2_INV, U476_2_INV, U477_2_INV, U479_2_INV, U481_2_INV,     U482_2_INV, U485_2_INV, U488_2_INV, U490_2_INV, U494_2_INV, U495_2_INV,     U497_2_INV, U499_2_INV, U500_2_INV, U503_2_INV, U508_2_INV, U513_2_INV,     U515_2_INV, U519_2_INV, U524_2_INV, U525_2_INV, U527_2_INV, U528_2_INV,     U531_2_INV, U534_2_INV, U536_2_INV, U537_2_INV, U540_2_INV, U543_2_INV,     U545_2_INV, U549_2_INV, U550_2_INV, \U262/n315_2_INV , \U267/n324_2_INV ,     \U276/n332_2_INV , \U284/n334_2_INV , \U294/n343_2_INV , \U304/n352_2_INV ,     \U314/n361_2_INV , \U329/n375_2_INV , \U338/n383_2_INV , \U343/n392_2_INV ,     \U351/n394_2_INV , \U366/n407_2_INV , \U376/n416_2_INV , \U382/n427_2_INV ,     \U391/n435_2_INV , \U404/n442_2_INV , \U409/n451_2_INV , \U422/n457_2_INV ,     \U427/n462_2_INV , \U432/n466_2_INV , \U442/n476_2_INV , \U451/n484_2_INV ,     \U456/n493_2_INV , \U465/n501_2_INV , \U478/n508_2_INV , \U483/n517_2_INV ,     \U496/n524_2_INV , \U501/n533_2_INV , \U514/n540_2_INV , \U518/n543_2_INV ,     \U523/n547_2_INV , \U529/n558_2_INV , \U538/n566_2_INV , \U551/n573_2_INV ,     \U238/$1I20_GTS_TRI_2_INV , \U239/$1I20_GTS_TRI_2_INV ,     \U240/$1I20_GTS_TRI_2_INV , \U241/$1I20_GTS_TRI_2_INV ,     \U242/$1I20_GTS_TRI_2_INV , \U243/$1I20_GTS_TRI_2_INV ,     \U244/$1I20_GTS_TRI_2_INV , \U245/$1I20_GTS_TRI_2_INV ,     \U246/$1I20_GTS_TRI_2_INV , \U247/$1I20_GTS_TRI_2_INV ,     \U248/$1I20_GTS_TRI_2_INV , \U249/$1I20_GTS_TRI_2_INV ,     \U250/$1I20_GTS_TRI_2_INV , \U251/$1I20_GTS_TRI_2_INV ,     \U252/$1I20_GTS_TRI_2_INV , \U253/$1I20_GTS_TRI_2_INV ;    `ifdef GTS_SIGNAL      wire GTS = `GTS_SIGNAL ;    `else      wire GTS ;    `endif    initial $sdf_annotate("time_sim.sdf");    X_BUF U218 (.IN (S[3]), .OUT (n101));    X_BUF U219 (.IN (S[2]), .OUT (n102));    X_BUF U220 (.IN (S[1]), .OUT (n103));    X_BUF U221 (.IN (S[0]), .OUT (n104));    X_BUF U222 (.IN (A_P[15]), .OUT (n105));    X_BUF U223 (.IN (A_P[14]), .OUT (n106));    X_BUF U224 (.IN (A_P[13]), .OUT (n107));    X_BUF U225 (.IN (A_P[12]), .OUT (n108));    X_BUF U226 (.IN (A_P[11]), .OUT (n109));    X_BUF U227 (.IN (A_P[10]), .OUT (n110));    X_BUF U228 (.IN (A_P[9]), .OUT (n111));    X_BUF U229 (.IN (A_P[8]), .OUT (n112));    X_BUF U230 (.IN (A_P[7]), .OUT (n113));    X_BUF U231 (.IN (A_P[6]), .OUT (n114));    X_BUF U232 (.IN (A_P[5]), .OUT (n115));    X_BUF U233 (.IN (A_P[4]), .OUT (n116));    X_BUF U234 (.IN (A_P[3]), .OUT (n117));    X_BUF U235 (.IN (A_P[2]), .OUT (n118));    X_BUF U236 (.IN (A_P[1]), .OUT (n119));    X_BUF U237 (.IN (A_P[0]), .OUT (n120));    X_OR2 U254 (.IN0 (n315), .IN1 (n316), .OUT (n590));    X_INV U255 (.IN (n247), .OUT (n309));    X_AND2 U256 (.IN0 (n102), .IN1 (n248), .OUT (U256_2_INV));    X_OR2 U257 (.IN0 (n102), .IN1 (n309), .OUT (n310));    X_INV U259 (.IN (n245), .OUT (n312));    X_AND2 U260 (.IN0 (n102), .IN1 (n246), .OUT (n313));    X_OR2 U261 (.IN0 (n102), .IN1 (n312), .OUT (U261_2_INV));    X_OR2 U263 (.IN0 (n323), .IN1 (n324), .OUT (n580));    X_INV U264 (.IN (n255), .OUT (n317));    X_AND2 U265 (.IN0 (n102), .IN1 (n256), .OUT (n318));    X_OR2 U266 (.IN0 (n102), .IN1 (n317), .OUT (U266_2_INV));    X_INV U268 (.IN (n253), .OUT (n320));    X_AND2 U269 (.IN0 (n102), .IN1 (n254), .OUT (U269_2_INV));    X_OR2 U270 (.IN0 (n102), .IN1 (n320), .OUT (n321));    X_OR2 U272 (.IN0 (n331), .IN1 (n332), .OUT (n579));    X_INV U273 (.IN (n251), .OUT (n325));    X_AND2 U274 (.IN0 (n102), .IN1 (n252), .OUT (n326));    X_OR2 U275 (.IN0 (n102), .IN1 (n325), .OUT (U275_2_INV));    X_INV U277 (.IN (n249), .OUT (n328));    X_AND2 U278 (.IN0 (n102), .IN1 (n250), .OUT (U278_2_INV));    X_OR2 U279 (.IN0 (n102), .IN1 (n328), .OUT (n329));    X_OR2 U281 (.IN0 (n340), .IN1 (n341), .OUT (n578));    X_INV U282 (.IN (n247), .OUT (n333));    X_AND2 U285 (.IN0 (n334), .IN1 (n335), .OUT (U285_2_INV));    X_INV U286 (.IN (n102), .OUT (n337));    X_INV U287 (.IN (n101), .OUT (n336));    X_AND2 U290 (.IN0 (n338), .IN1 (n339), .OUT (U290_2_INV));    X_OR2 U291 (.IN0 (n349), .IN1 (n350), .OUT (n577));    X_INV U292 (.IN (n243), .OUT (n342));    X_AND2 U295 (.IN0 (n343), .IN1 (n344), .OUT (U295_2_INV));    X_INV U296 (.IN (n102), .OUT (n346));    X_INV U297 (.IN (n101), .OUT (n345));    X_AND2 U300 (.IN0 (n347), .IN1 (n348), .OUT (U300_2_INV));    X_OR2 U301 (.IN0 (n358), .IN1 (n359), .OUT (n576));    X_INV U302 (.IN (n255), .OUT (n351));    X_AND2 U305 (.IN0 (n352), .IN1 (n353), .OUT (U305_2_INV));    X_INV U306 (.IN (n102), .OUT (n355));    X_INV U307 (.IN (n101), .OUT (n354));    X_AND2 U310 (.IN0 (n356), .IN1 (n357), .OUT (U310_2_INV));    X_OR2 U311 (.IN0 (n367), .IN1 (n368), .OUT (n575));    X_INV U312 (.IN (n251), .OUT (n360));    X_AND2 U315 (.IN0 (n361), .IN1 (n362), .OUT (U315_2_INV));    X_INV U316 (.IN (n102), .OUT (n364));    X_INV U317 (.IN (n101), .OUT (n363));    X_AND2 U320 (.IN0 (n365), .IN1 (n366), .OUT (U320_2_INV));    X_OR2 U321 (.IN0 (n375), .IN1 (n376), .OUT (n589));    X_INV U322 (.IN (n243), .OUT (n369));    X_AND2 U323 (.IN0 (n102), .IN1 (n244), .OUT (U323_2_INV));    X_OR2 U324 (.IN0 (n102), .IN1 (n369), .OUT (n370));    X_INV U326 (.IN (n241), .OUT (n372));    X_AND2 U327 (.IN0 (n102), .IN1 (n242), .OUT (n373));    X_OR2 U328 (.IN0 (n102), .IN1 (n372), .OUT (U328_2_INV));    X_OR2 U330 (.IN0 (n383), .IN1 (n384), .OUT (n588));    X_INV U331 (.IN (n255), .OUT (n377));    X_AND2 U332 (.IN0 (n102), .IN1 (n256), .OUT (U332_2_INV));    X_OR2 U333 (.IN0 (n102), .IN1 (n377), .OUT (n378));    X_INV U335 (.IN (n253), .OUT (n380));    X_AND2 U336 (.IN0 (n102), .IN1 (n254), .OUT (n381));    X_OR2 U337 (.IN0 (n102), .IN1 (n380), .OUT (U337_2_INV));    X_OR2 U339 (.IN0 (n392), .IN1 (n391), .OUT (n587));    X_INV U340 (.IN (n249), .OUT (n385));    X_AND2 U341 (.IN0 (n102), .IN1 (n250), .OUT (n386));    X_OR2 U342 (.IN0 (n102), .IN1 (n385), .OUT (U342_2_INV));    X_INV U344 (.IN (n251), .OUT (n388));    X_AND2 U345 (.IN0 (n102), .IN1 (n252), .OUT (U345_2_INV));    X_OR2 U346 (.IN0 (n102), .IN1 (n388), .OUT (n389));    X_OR2 U348 (.IN0 (n401), .IN1 (n400), .OUT (n586));    X_INV U349 (.IN (n245), .OUT (n393));    X_AND2 U352 (.IN0 (n394), .IN1 (n395), .OUT (U352_2_INV));    X_INV U353 (.IN (n102), .OUT (n397));    X_INV U354 (.IN (n101), .OUT (n396));    X_AND2 U357 (.IN0 (n398), .IN1 (n399), .OUT (U357_2_INV));    X_OR2 U358 (.IN0 (n409), .IN1 (n410), .OUT (n585));    X_INV U359 (.IN (n102), .OUT (n403));    X_INV U360 (.IN (n101), .OUT (n402));    X_AND2 U363 (.IN0 (n404), .IN1 (n405), .OUT (U363_2_INV));    X_INV U364 (.IN (n241), .OUT (n406));    X_AND2 U367 (.IN0 (n407), .IN1 (n408), .OUT (U367_2_INV));    X_OR2 U368 (.IN0 (n418), .IN1 (n419), .OUT (n584));    X_INV U369 (.IN (n102), .OUT (n412));    X_INV U370 (.IN (n101), .OUT (n411));    X_AND2 U373 (.IN0 (n413), .IN1 (n414), .OUT (U373_2_INV));    X_INV U374 (.IN (n253), .OUT (n415));    X_AND2 U377 (.IN0 (n416), .IN1 (n417), .OUT (U377_2_INV));    X_OR2 U378 (.IN0 (n427), .IN1 (n426), .OUT (U378_2_INV));    X_INV U379 (.IN (n104), .OUT (n420));    X_OR2 U380 (.IN0 (n420), .IN1 (n105), .OUT (U380_2_INV));    X_OR2 U381 (.IN0 (n106), .IN1 (n104), .OUT (U381_2_INV));    X_INV U383 (.IN (n119), .OUT (n423));    X_AND2 U384 (.IN0 (n104), .IN1 (n423), .OUT (U384_2_INV));    X_OR2 U385 (.IN0 (n120), .IN1 (n104), .OUT (n424));    X_OR2 U387 (.IN0 (n434), .IN1 (n435), .OUT (U387_2_INV));    X_INV U388 (.IN (n104), .OUT (n428));    X_OR2 U389 (.IN0 (n428), .IN1 (n109), .OUT (U389_2_INV));    X_OR2 U390 (.IN0 (n110), .IN1 (n104), .OUT (U390_2_INV));    X_INV U392 (.IN (n107), .OUT (n431));    X_AND2 U393 (.IN0 (n104), .IN1 (n431), .OUT (U393_2_INV));    X_OR2 U394 (.IN0 (n108), .IN1 (n104), .OUT (n432));    X_OR2 U396 (.IN0 (n443), .IN1 (n442), .OUT (U396_2_INV));    X_INV U397 (.IN (n111), .OUT (n436));    X_AND2 U398 (.IN0 (n104), .IN1 (n436), .OUT (U398_2_INV));    X_OR2 U399 (.IN0 (n112), .IN1 (n104), .OUT (n437));    X_INV U401 (.IN (n104), .OUT (n439));    X_OR2 U402 (.IN0 (n439), .IN1 (n113), .OUT (U402_2_INV));    X_OR2 U403 (.IN0 (n114), .IN1 (n104), .OUT (U403_2_INV));    X_OR2 U405 (.IN0 (n450), .IN1 (n451), .OUT (U405_2_INV));    X_INV U406 (.IN (n104), .OUT (n444));    X_OR2 U407 (.IN0 (n444), .IN1 (n117), .OUT (U407_2_INV));    X_OR2 U408 (.IN0 (n118), .IN1 (n104), .OUT (U408_2_INV));    X_INV U410 (.IN (n115), .OUT (n447));    X_AND2 U411 (.IN0 (n104), .IN1 (n447), .OUT (U411_2_INV));    X_OR2 U412 (.IN0 (n116), .IN1 (n104), .OUT (n448));    X_OR2 U414 (.IN0 (n459), .IN1 (n460), .OUT (n583));    X_INV U415 (.IN (n102), .OUT (n453));    X_INV U416 (.IN (n101), .OUT (n452));    X_AND2 U419 (.IN0 (n454), .IN1 (n455), .OUT (U419_2_INV));    X_INV U420 (.IN (n249), .OUT (n456));    X_AND2 U423 (.IN0 (n457), .IN1 (n458), .OUT (U423_2_INV));    X_OR2 U424 (.IN0 (n469), .IN1 (n468), .OUT (U424_2_INV));    X_INV U425 (.IN (n105), .OUT (n461));    X_AND2 U428 (.IN0 (n462), .IN1 (n463), .OUT (U428_2_INV));    X_INV U429 (.IN (n119), .OUT (n464));    X_INV U430 (.IN (n103), .OUT (n465));    X_AND2 U433 (.IN0 (n466), .IN1 (n467), .OUT (U433_2_INV));    X_OR2 U434 (.IN0 (n477), .IN1 (n476), .OUT (U434_2_INV));    X_INV U435 (.IN (n106), .OUT (n470));    X_AND2 U436 (.IN0 (n104), .IN1 (n470), .OUT (U436_2_INV));    X_OR2 U437 (.IN0 (n107), .IN1 (n104), .OUT (n471));    X_INV U439 (.IN (n104), .OUT (n473));    X_OR2 U440 (.IN0 (n473), .IN1 (n108), .OUT (U440_2_INV));    X_OR2 U441 (.IN0 (n109), .IN1 (n104), .OUT (U441_2_INV));    X_OR2 U443 (.IN0 (n485), .IN1 (n484), .OUT (U443_2_INV));    X_INV U444 (.IN (n110), .OUT (n478));    X_AND2 U445 (.IN0 (n104), .IN1 (n478), .OUT (U445_2_INV));    X_OR2 U446 (.IN0 (n111), .IN1 (n104), .OUT (n479));    X_INV U448 (.IN (n104), .OUT (n481));    X_OR2 U449 (.IN0 (n481), .IN1 (n112), .OUT (U449_2_INV));    X_OR2 U450 (.IN0 (n113), .IN1 (n104), .OUT (U450_2_INV));    X_OR2 U452 (.IN0 (n492), .IN1 (n493), .OUT (U452_2_INV));    X_INV U453 (.IN (n104), .OUT (n486));    X_OR2 U454 (.IN0 (n486), .IN1 (n116), .OUT (U454_2_INV));    X_OR2 U455 (.IN0 (n117), .IN1 (n104), .OUT (U455_2_INV));    X_INV U457 (.IN (n114), .OUT (n489));    X_AND2 U458 (.IN0 (n104), .IN1 (n489), .OUT (U458_2_INV));