?? time_sim.sdf
字號:
(DELAYFILE (SDFVERSION "2.1") (DESIGN "one_hot") (DATE "Tue Jan 6 18:00:56 1998") (VENDOR "Xilinx") (PROGRAM "Xilinx VERILOG SDF writer") (VERSION "M1.4.12") (DIVIDER /) (VOLTAGE 5.00:5.00:5.00) (PROCESS) (TEMPERATURE 25.00:25.00:25.00) (TIMESCALE 1ps) (CELL (CELLTYPE "X_BUF") (INSTANCE U102) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (2050:2050:2050) (2050:2050:2050)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U103) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (2050:2050:2050) (2050:2050:2050)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U104) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (2050:2050:2050) (2050:2050:2050)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U105) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (2050:2050:2050) (2050:2050:2050)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U106) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (2050:2050:2050) (2050:2050:2050)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U107) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (2050:2050:2050) (2050:2050:2050)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U112) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U113) (DELAY (ABSOLUTE (PORT IN (1353:1353:1353) (1353:1353:1353)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U114) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (1600:1600:1600) (1600:1600:1600)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_XOR2") (INSTANCE U115) (DELAY (ABSOLUTE (PORT IN0 (1025:1025:1025) (1025:1025:1025)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1225:1225:1225) (1225:1225:1225)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U116) (DELAY (ABSOLUTE (PORT IN0 (1184:1184:1184) (1184:1184:1184)) (IOPATH IN0 OUT (1600:1600:1600) (1600:1600:1600)) (PORT IN1 (1952:1952:1952) (1952:1952:1952)) (IOPATH IN1 OUT (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U117) (DELAY (ABSOLUTE (PORT IN (1086:1086:1086) (1086:1086:1086)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U118) (DELAY (ABSOLUTE (PORT IN0 (1438:1438:1438) (1438:1438:1438)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U119) (DELAY (ABSOLUTE (PORT IN0 (1438:1438:1438) (1438:1438:1438)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1037:1037:1037) (1037:1037:1037)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U121) (DELAY (ABSOLUTE (PORT IN0 (1416:1416:1416) (1416:1416:1416)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1138:1138:1138) (1138:1138:1138)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U122) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1626:1626:1626) (1626:1626:1626)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U123) (DELAY (ABSOLUTE (PORT IN0 (1681:1681:1681) (1681:1681:1681)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1416:1416:1416) (1416:1416:1416)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U124) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (1600:1600:1600) (1600:1600:1600)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U125) (DELAY (ABSOLUTE (PORT IN (1278:1278:1278) (1278:1278:1278)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U127) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U128) (DELAY (ABSOLUTE (PORT IN0 (1210:1210:1210) (1210:1210:1210)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1819:1819:1819) (1819:1819:1819)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U129) (DELAY (ABSOLUTE (PORT IN0 (1081:1081:1081) (1081:1081:1081)) (IOPATH IN0 OUT (2420:2420:2420) (2420:2420:2420)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U131) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U132) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U134) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U135) (DELAY (ABSOLUTE (PORT IN (2097:2097:2097) (2097:2097:2097)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U136) (DELAY (ABSOLUTE (PORT IN (1184:1184:1184) (1184:1184:1184)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U137) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (1600:1600:1600) (1600:1600:1600)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (1600:1600:1600) (1600:1600:1600)) ) ) ) (CELL (CELLTYPE "X_XOR2") (INSTANCE U138) (DELAY (ABSOLUTE (PORT IN0 (1457:1457:1457) (1457:1457:1457)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1225:1225:1225) (1225:1225:1225)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U139) (DELAY (ABSOLUTE (PORT IN (2098:2098:2098) (2098:2098:2098)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U140) (DELAY (ABSOLUTE (PORT IN0 (1254:1254:1254) (1254:1254:1254)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_AND2") (INSTANCE U141) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1248:1248:1248) (1248:1248:1248)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U142) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (2420:2420:2420) (2420:2420:2420)) (PORT IN1 (1828:1828:1828) (1828:1828:1828)) (IOPATH IN1 OUT (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U143) (DELAY (ABSOLUTE (PORT IN (1278:1278:1278) (1278:1278:1278)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U145) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U146) (DELAY (ABSOLUTE (PORT IN0 (1175:1175:1175) (1175:1175:1175)) (IOPATH IN0 OUT (0:0:0) (0:0:0)) (PORT IN1 (1210:1210:1210) (1210:1210:1210)) (IOPATH IN1 OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U147) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (2420:2420:2420) (2420:2420:2420)) (PORT IN1 (1547:1547:1547) (1547:1547:1547)) (IOPATH IN1 OUT (2420:2420:2420) (2420:2420:2420)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U148) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE U149) (DELAY (ABSOLUTE (PORT IN0 (0:0:0) (0:0:0)) (IOPATH IN0 OUT (2289:2289:2289) (2289:2289:2289)) (PORT IN1 (0:0:0) (0:0:0)) (IOPATH IN1 OUT (2289:2289:2289) (2289:2289:2289)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U150) (DELAY (ABSOLUTE (PORT IN (1408:1408:1408) (1408:1408:1408)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U151) (DELAY (ABSOLUTE (PORT IN (1824:1824:1824) (1824:1824:1824)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_INV") (INSTANCE U153) (DELAY (ABSOLUTE (PORT IN (1608:1608:1608) (1608:1608:1608)) (IOPATH IN OUT (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U108\/\$1I20) (DELAY (ABSOLUTE (PORT IN (1703:1703:1703) (1703:1703:1703)) (IOPATH IN OUT (7300:7300:7300) (7300:7300:7300)) ) ) ) (CELL (CELLTYPE "X_TRI") (INSTANCE U108\/\$1I20_GTS_TRI_121) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (0:0:0) (0:0:0)) (IOPATH CTL OUT ( ) ( ) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U109\/\$1I20) (DELAY (ABSOLUTE (PORT IN (1315:1315:1315) (1315:1315:1315)) (IOPATH IN OUT (7300:7300:7300) (7300:7300:7300)) ) ) ) (CELL (CELLTYPE "X_TRI") (INSTANCE U109\/\$1I20_GTS_TRI_122) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (0:0:0) (0:0:0)) (IOPATH CTL OUT ( ) ( ) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_BUF") (INSTANCE U110\/\$1I20) (DELAY (ABSOLUTE (PORT IN (1315:1315:1315) (1315:1315:1315)) (IOPATH IN OUT (7300:7300:7300) (7300:7300:7300)) ) ) ) (CELL (CELLTYPE "X_TRI") (INSTANCE U110\/\$1I20_GTS_TRI_123) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (IOPATH IN OUT (0:0:0) (0:0:0)) (IOPATH CTL OUT ( ) ( ) (0:0:0) (0:0:0) (0:0:0) (0:0:0)) ) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE CS_reg\<3\>\/\$1I13) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (PORT CLK (1228:1228:1228) (1228:1228:1228)) (IOPATH CLK OUT (2820:2820:2820) (0:0:0)) (IOPATH SET OUT (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST OUT (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (SETUP RST (posedge CLK) (0:0:0)) (SETUP IN (posedge CLK) (0:0:0)) (HOLD IN (posedge CLK) (0:0:0)) (HOLD RST (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000)) ) ) (CELL (CELLTYPE "X_OR2") (INSTANCE CS_reg\<3\>\/\$1I13_GSR_OR_115) (DELAY (ABSOLUTE (PORT IN0 (2555:2555:2555) (2555:2555:2555)) (IOPATH IN0 OUT (3989:3989:3989) (3989:3989:3989)) (PORT IN1 (13441:13441:13441) (13441:13441:13441)) (IOPATH IN1 OUT (3989:3989:3989) (3989:3989:3989)) ) ) ) (CELL (CELLTYPE "X_FF") (INSTANCE CS_reg\<5\>\/\$1I13) (DELAY (ABSOLUTE (PORT IN (0:0:0) (0:0:0)) (PORT CLK (1235:1235:1235) (1235:1235:1235)) (IOPATH CLK OUT (2820:2820:2820) (0:0:0)) (IOPATH SET OUT (0:0:0) (0:0:0)) (PORT RST (0:0:0) (0:0:0)) (IOPATH RST OUT (0:0:0) (0:0:0)) ) ) (TIMINGCHECK (WIDTH (posedge CLK) (4000:4000:4000)) (WIDTH (negedge CLK) (4000:4000:4000)) (SETUP RST (posedge CLK) (0:0:0)) (SETUP IN (posedge CLK) (0:0:0)) (HOLD RST (posedge CLK) (0:0:0)) (HOLD IN (posedge CLK) (0:0:0)) (WIDTH (posedge RST) (4000:4000:4000))?? 快捷鍵說明
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