--------------------------------------------------------------------------------Xilinx TRACE, Version M1.4.12Copyright (c) 1995-1997 Xilinx, Inc.  All rights reserved.Design file:              one_hot.ncdPhysical constraint file: one_hot.pcfDevice,speed:             xc4005e,-2 (x1_0.86  PRELIMINARY)Report level:             summary report--------------------------------------------------------------------------------WARNING:bastw:172 - No timing constraints found, doing advanced analysis with   offsets.================================================================================Timing constraint: Default period analysis for net n85 42 items analyzed, 0 timing errors detected. Minimum period is  13.037ns.--------------------------------------------------------------------------------================================================================================Timing constraint: Default OFFSET IN BEFORE analysis for clock "n85" 21 items analyzed, 0 timing errors detected. Minimum allowable offset is   5.409ns.--------------------------------------------------------------------------------================================================================================Timing constraint: Default OFFSET OUT AFTER analysis for clock "n85" 8 items analyzed, 0 timing errors detected. Maximum allowable offset is  19.080ns.--------------------------------------------------------------------------------================================================================================Timing constraint: Default path analysis 14 items analyzed, 0 timing errors detected. Maximum delay is  15.132ns.--------------------------------------------------------------------------------All constraints were met.Timing summary:---------------Timing errors: 0  Score: 0Constraints cover 66 paths, 0 nets, and 54 connections (100.0% coverage)Design statistics:   Minimum period:  13.037ns (Maximum frequency:  76.705MHz)   Maximum combinational path delay:  15.132ns   Minimum input arrival time before clock:   5.409ns   Maximum output required time before clock:  19.080nsAnalysis completed Tue Jan  6 15:57:11 1998--------------------------------------------------------------------------------