Xilinx Mapping Report File for Design "use_gr"          Copyright (c) 1995-1997 Xilinx, Inc.  All rights reserved.Design Information------------------Command Line   : map use_gr.ngd -o map.ncd use_gr.pcf Target Device  : x5202Target Package : pc84Target Speed   : -4Mapper Version : xc5200 -- M1.4.12Mapped Date    : Tue Jan  6 19:02:01 1998Design Summary--------------   Number of errors:    0   Number of warnings:  9   Number of LCs                           :   25 out of  256    9%       Number of LUTs                      :   25 out of  256    9%       Number of FFLATCHs                  :    8 out of  256    3%           Number of Flipflops             :    8 out of  256    3%       Number of CYMUXs                    :    8 out of  256    3%   Number of External CLKIOBs              :    1 out of    4   25%   Number of External Iobs                 :    9 out of   65   13%       Number of Inputs                    :    1 out of   65    1%       Number of Outputs                   :    8 out of   65   12%   Number of Global Clock Buffers          :    1 out of    4   25%   Uses STARTUP   Number of macros                        :    2Total equivalent gate count for design: 157Additional JTAG gate count for IOBs:    480Table of Contents-----------------Section 1 - ErrorsSection 2 - WarningsSection 3 - Design AttributesSection 4 - Removed Logic SummarySection 5 - Removed LogicSection 6 - Added LogicSection 7 - Expanded LogicSection 8 - Signal Cross-ReferenceSection 9 - Symbol Cross-ReferenceSection 10 - IOB PropertiesSection 11 - RPMsSection 12 - Guide ReportSection 1 - Errors------------------Section 2 - Warnings--------------------WARNING:baste:24 - All of the external outputs in this design are using   slew-rate-limited output drivers.  The delay on speed critical outputs can be   dramatically reduced by designating them as fast outputs in the original   design.  Please see your vendor interface documentation for specific   information on how to do this within your design-entry tool.   Note: You should be careful not to designate too many outputs which switch   together as fast, because this can cause excessive ground bounce.  For more   information on this subject, please refer to the IOB switching characteristic   guidelines for the device you are using in the Programmable Logic Data Book.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "sub_27/u6"   (output signal=DNCNT44<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "sub_27/u6"   (output signal=DNCNT44<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "sub_27/u6"   (output signal=DNCNT44<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "sub_27/u6"   (output signal=DNCNT44<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "add_26/u6"   (output signal=UPCNT37<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "add_26/u6"   (output signal=UPCNT37<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "add_26/u6"   (output signal=UPCNT37<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.WARNING:x52ma:187 - All the logic for "INC_DEC_UBIN_6 symbol "add_26/u6"   (output signal=UPCNT37<3>)" has been removed!  This may be caused by key   logic being trimmed.  Please consult the Removed Logic section of this report   to see if this is the case.Section 3 - Design Attributes-----------------------------Section 4 - Removed Logic Summary---------------------------------  14 Block(s) trimmed   1 block(s) removed   6 block(s) optimized away  14 signal(s) removed   1 signal(s) mergedSection 5 - Removed Logic-------------------------Block "DNCNT_reg<3>/SYM2" (INV) redundant - removed.Block "add_26/u6/GND.ZERO" (X_ZERO) removed due to optimization.Block "sub_27/u6/GND.ZERO" (X_ZERO) removed due to optimization.Block "net8.ZERO" (X_ZERO) removed due to optimization.Block "net9.ZERO" (X_ZERO) removed due to optimization.Block "add_26/n19.ONE" (X_ONE) removed due to optimization.Block "sub_27/n20.ZERO" (X_ZERO) removed due to optimization.The trimmed logic reported below is either:   1. part of a cycle   2. part of disabled logic   3. a side-effect of other trimmed logicThe signal "add_26/grnd_sig" is unused and has been removed. Unused block "add_26/grnd_sig.ZERO" (X_ZERO) removed.The signal "sub_27/grnd_sig" is unused and has been removed. Unused block "sub_27/grnd_sig.ZERO" (X_ZERO) removed.The signal "add_26/u6/S0_1/MUX_SEL_2_0" is unused and has been removed. Unused block "add_26/u6/S0_1/XOR9_MUX_SEL_2_0" (XOR2) removed.The signal "add_26/u6/FUNC<5>" is unused and has been removed. Unused block "add_26/u6/S0_1/XOR12_SUM_2_1" (XOR2) removed.  The signal "add_26/u6/S0_1/CO_5" is unused and has been removed.   Unused block "add_26/u6/S0_1/CY_MUX_2_0" (CY_MUX) removed.    The signal "add_26/u6/S0_1/CO_4" is unused and has been removed.     Unused block "add_26/u6/S0_1/CY_MUX_1_3" (CY_MUX) removed.  The signal "add_26/u6/S0_1/MUX_SEL_2_1" is unused and has been removed.   Unused block "add_26/u6/S0_1/XOR11_MUX_SEL_2_1" (XOR2) removed.The signal "add_26/u6/FUNC<4>" is unused and has been removed. Unused block "add_26/u6/S0_1/XOR10_SUM_2_0" (XOR2) removed.The signal "sub_27/u6/S0_1/MUX_SEL_2_0" is unused and has been removed. Unused block "sub_27/u6/S0_1/XOR9_MUX_SEL_2_0" (XOR2) removed.The signal "sub_27/u6/FUNC<5>" is unused and has been removed. Unused block "sub_27/u6/S0_1/XOR12_SUM_2_1" (XOR2) removed.  The signal "sub_27/u6/S0_1/CO_5" is unused and has been removed.   Unused block "sub_27/u6/S0_1/CY_MUX_2_0" (CY_MUX) removed.    The signal "sub_27/u6/S0_1/CO_4" is unused and has been removed.     Unused block "sub_27/u6/S0_1/CY_MUX_1_3" (CY_MUX) removed.  The signal "sub_27/u6/S0_1/MUX_SEL_2_1" is unused and has been removed.   Unused block "sub_27/u6/S0_1/XOR11_MUX_SEL_2_1" (XOR2) removed.The signal "sub_27/u6/FUNC<4>" is unused and has been removed. Unused block "sub_27/u6/S0_1/XOR10_SUM_2_0" (XOR2) removed.Merged Signal(s):The signal "n125" was merged into signal "DNCNT_reg<3>/Q_OUT".Section 6 - Added Logic-----------------------Section 7 - Expanded Logic--------------------------To enable this section, set the environment variable MAP_REPORT_DETAIL to TRUEand rerun MAP.Section 8 - Signal Cross-Reference----------------------------------To enable this section, set the environment variable MAP_REPORT_DETAIL to TRUEand rerun MAP.Section 9 - Symbol Cross-Reference----------------------------------To enable this section, set the environment variable MAP_REPORT_DETAIL to TRUEand rerun MAP.Section 10 - IOB Properties---------------------------Section 11 - RPMs-----------------add_26/u6/S0_1/hset                      - 9 compssub_27/u6/S0_1/hset                      - 9 compsSection 12 - Guide Report-------------------------Guide not run on this design.