--operation mode is normal

A1L140 = !state.toggle_e & !state.hold;


--next_command.display_clear is next_command.display_clear
--operation mode is normal

next_command.display_clear_lut_out = state.display_off # next_command.display_clear & (state.toggle_e # state.hold);
next_command.display_clear = DFFEAS(next_command.display_clear_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.mode_set is next_command.mode_set
--operation mode is normal

next_command.mode_set_lut_out = state.display_on # next_command.mode_set & (state.toggle_e # state.hold);
next_command.mode_set = DFFEAS(next_command.mode_set_lut_out, CLK_400HZ, !RES, , , , , , );


--next_command.return_home is next_command.return_home
--operation mode is normal

next_command.return_home_lut_out = state.write_char7 # next_command.return_home & (state.toggle_e # state.hold);
next_command.return_home = DFFEAS(next_command.return_home_lut_out, CLK_400HZ, !RES, , , , , , );


--CLK_COUNT_400HZ[16] is CLK_COUNT_400HZ[16]
--operation mode is arithmetic

CLK_COUNT_400HZ[16]_carry_eqn = A1L49;
CLK_COUNT_400HZ[16]_lut_out = CLK_COUNT_400HZ[16] $ (!CLK_COUNT_400HZ[16]_carry_eqn);
CLK_COUNT_400HZ[16] = DFFEAS(CLK_COUNT_400HZ[16]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L51 is CLK_COUNT_400HZ[16]~337
--operation mode is arithmetic

A1L51 = CARRY(CLK_COUNT_400HZ[16] & (!A1L49));


--CLK_COUNT_400HZ[17] is CLK_COUNT_400HZ[17]
--operation mode is arithmetic

CLK_COUNT_400HZ[17]_carry_eqn = A1L51;
CLK_COUNT_400HZ[17]_lut_out = CLK_COUNT_400HZ[17] $ (CLK_COUNT_400HZ[17]_carry_eqn);
CLK_COUNT_400HZ[17] = DFFEAS(CLK_COUNT_400HZ[17]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L53 is CLK_COUNT_400HZ[17]~341
--operation mode is arithmetic

A1L53 = CARRY(!A1L51 # !CLK_COUNT_400HZ[17]);


--CLK_COUNT_400HZ[18] is CLK_COUNT_400HZ[18]
--operation mode is arithmetic

CLK_COUNT_400HZ[18]_carry_eqn = A1L53;
CLK_COUNT_400HZ[18]_lut_out = CLK_COUNT_400HZ[18] $ (!CLK_COUNT_400HZ[18]_carry_eqn);
CLK_COUNT_400HZ[18] = DFFEAS(CLK_COUNT_400HZ[18]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L55 is CLK_COUNT_400HZ[18]~345
--operation mode is arithmetic

A1L55 = CARRY(CLK_COUNT_400HZ[18] & (!A1L53));


--CLK_COUNT_400HZ[19] is CLK_COUNT_400HZ[19]
--operation mode is normal

CLK_COUNT_400HZ[19]_carry_eqn = A1L55;
CLK_COUNT_400HZ[19]_lut_out = CLK_COUNT_400HZ[19] $ (CLK_COUNT_400HZ[19]_carry_eqn);
CLK_COUNT_400HZ[19] = DFFEAS(CLK_COUNT_400HZ[19]_lut_out, CLK, VCC, , , , , A1L57, );


--A1L92 is LessThan~846
--operation mode is normal

A1L92 = !CLK_COUNT_400HZ[16] & !CLK_COUNT_400HZ[17] & !CLK_COUNT_400HZ[18] & !CLK_COUNT_400HZ[19];


--CLK_COUNT_400HZ[5] is CLK_COUNT_400HZ[5]
--operation mode is arithmetic

CLK_COUNT_400HZ[5]_carry_eqn = A1L27;
CLK_COUNT_400HZ[5]_lut_out = CLK_COUNT_400HZ[5] $ (CLK_COUNT_400HZ[5]_carry_eqn);
CLK_COUNT_400HZ[5] = DFFEAS(CLK_COUNT_400HZ[5]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L29 is CLK_COUNT_400HZ[5]~353
--operation mode is arithmetic

A1L29 = CARRY(!A1L27 # !CLK_COUNT_400HZ[5]);


--CLK_COUNT_400HZ[6] is CLK_COUNT_400HZ[6]
--operation mode is arithmetic

CLK_COUNT_400HZ[6]_carry_eqn = A1L29;
CLK_COUNT_400HZ[6]_lut_out = CLK_COUNT_400HZ[6] $ (!CLK_COUNT_400HZ[6]_carry_eqn);
CLK_COUNT_400HZ[6] = DFFEAS(CLK_COUNT_400HZ[6]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L31 is CLK_COUNT_400HZ[6]~357
--operation mode is arithmetic

A1L31 = CARRY(CLK_COUNT_400HZ[6] & (!A1L29));


--CLK_COUNT_400HZ[7] is CLK_COUNT_400HZ[7]
--operation mode is arithmetic

CLK_COUNT_400HZ[7]_carry_eqn = A1L31;
CLK_COUNT_400HZ[7]_lut_out = CLK_COUNT_400HZ[7] $ (CLK_COUNT_400HZ[7]_carry_eqn);
CLK_COUNT_400HZ[7] = DFFEAS(CLK_COUNT_400HZ[7]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L33 is CLK_COUNT_400HZ[7]~361
--operation mode is arithmetic

A1L33 = CARRY(!A1L31 # !CLK_COUNT_400HZ[7]);


--CLK_COUNT_400HZ[8] is CLK_COUNT_400HZ[8]
--operation mode is arithmetic

CLK_COUNT_400HZ[8]_carry_eqn = A1L33;
CLK_COUNT_400HZ[8]_lut_out = CLK_COUNT_400HZ[8] $ (!CLK_COUNT_400HZ[8]_carry_eqn);
CLK_COUNT_400HZ[8] = DFFEAS(CLK_COUNT_400HZ[8]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L35 is CLK_COUNT_400HZ[8]~365
--operation mode is arithmetic

A1L35 = CARRY(CLK_COUNT_400HZ[8] & (!A1L33));


--A1L93 is LessThan~847
--operation mode is normal

A1L93 = !CLK_COUNT_400HZ[7] & !CLK_COUNT_400HZ[8] & (!CLK_COUNT_400HZ[6] # !CLK_COUNT_400HZ[5]);


--CLK_COUNT_400HZ[9] is CLK_COUNT_400HZ[9]
--operation mode is arithmetic

CLK_COUNT_400HZ[9]_carry_eqn = A1L35;
CLK_COUNT_400HZ[9]_lut_out = CLK_COUNT_400HZ[9] $ (CLK_COUNT_400HZ[9]_carry_eqn);
CLK_COUNT_400HZ[9] = DFFEAS(CLK_COUNT_400HZ[9]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L37 is CLK_COUNT_400HZ[9]~369
--operation mode is arithmetic

A1L37 = CARRY(!A1L35 # !CLK_COUNT_400HZ[9]);


--CLK_COUNT_400HZ[12] is CLK_COUNT_400HZ[12]
--operation mode is arithmetic

CLK_COUNT_400HZ[12]_carry_eqn = A1L41;
CLK_COUNT_400HZ[12]_lut_out = CLK_COUNT_400HZ[12] $ (!CLK_COUNT_400HZ[12]_carry_eqn);
CLK_COUNT_400HZ[12] = DFFEAS(CLK_COUNT_400HZ[12]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L43 is CLK_COUNT_400HZ[12]~373
--operation mode is arithmetic

A1L43 = CARRY(CLK_COUNT_400HZ[12] & (!A1L41));


--CLK_COUNT_400HZ[10] is CLK_COUNT_400HZ[10]
--operation mode is arithmetic

CLK_COUNT_400HZ[10]_carry_eqn = A1L37;
CLK_COUNT_400HZ[10]_lut_out = CLK_COUNT_400HZ[10] $ (!CLK_COUNT_400HZ[10]_carry_eqn);
CLK_COUNT_400HZ[10] = DFFEAS(CLK_COUNT_400HZ[10]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L39 is CLK_COUNT_400HZ[10]~377
--operation mode is arithmetic

A1L39 = CARRY(CLK_COUNT_400HZ[10] & (!A1L37));


--A1L94 is LessThan~848
--operation mode is normal

A1L94 = !CLK_COUNT_400HZ[12] & !CLK_COUNT_400HZ[10] & (A1L93 # !CLK_COUNT_400HZ[9]);


--CLK_COUNT_400HZ[11] is CLK_COUNT_400HZ[11]
--operation mode is arithmetic

CLK_COUNT_400HZ[11]_carry_eqn = A1L39;
CLK_COUNT_400HZ[11]_lut_out = CLK_COUNT_400HZ[11] $ (CLK_COUNT_400HZ[11]_carry_eqn);
CLK_COUNT_400HZ[11] = DFFEAS(CLK_COUNT_400HZ[11]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L41 is CLK_COUNT_400HZ[11]~381
--operation mode is arithmetic

A1L41 = CARRY(!A1L39 # !CLK_COUNT_400HZ[11]);


--CLK_COUNT_400HZ[13] is CLK_COUNT_400HZ[13]
--operation mode is arithmetic

CLK_COUNT_400HZ[13]_carry_eqn = A1L43;
CLK_COUNT_400HZ[13]_lut_out = CLK_COUNT_400HZ[13] $ (CLK_COUNT_400HZ[13]_carry_eqn);
CLK_COUNT_400HZ[13] = DFFEAS(CLK_COUNT_400HZ[13]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L45 is CLK_COUNT_400HZ[13]~385
--operation mode is arithmetic

A1L45 = CARRY(!A1L43 # !CLK_COUNT_400HZ[13]);


--CLK_COUNT_400HZ[14] is CLK_COUNT_400HZ[14]
--operation mode is arithmetic

CLK_COUNT_400HZ[14]_carry_eqn = A1L45;
CLK_COUNT_400HZ[14]_lut_out = CLK_COUNT_400HZ[14] $ (!CLK_COUNT_400HZ[14]_carry_eqn);
CLK_COUNT_400HZ[14] = DFFEAS(CLK_COUNT_400HZ[14]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L47 is CLK_COUNT_400HZ[14]~389
--operation mode is arithmetic

A1L47 = CARRY(CLK_COUNT_400HZ[14] & (!A1L45));


--A1L95 is LessThan~849
--operation mode is normal

A1L95 = !CLK_COUNT_400HZ[12] & !CLK_COUNT_400HZ[11] # !CLK_COUNT_400HZ[14] # !CLK_COUNT_400HZ[13];


--CLK_COUNT_400HZ[15] is CLK_COUNT_400HZ[15]
--operation mode is arithmetic

CLK_COUNT_400HZ[15]_carry_eqn = A1L47;
CLK_COUNT_400HZ[15]_lut_out = CLK_COUNT_400HZ[15] $ (CLK_COUNT_400HZ[15]_carry_eqn);
CLK_COUNT_400HZ[15] = DFFEAS(CLK_COUNT_400HZ[15]_lut_out, CLK, VCC, , , , , A1L57, );

--A1L49 is CLK_COUNT_400HZ[15]~393
--operation mode is arithmetic

A1L49 = CARRY(!A1L47 # !CLK_COUNT_400HZ[15]);


--A1L96 is LessThan~850
--operation mode is normal

A1L96 = A1L92 & (A1L94 # A1L95 # !CLK_COUNT_400HZ[15]);


--MB1L11 is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|name_gen~33
--operation mode is normal

MB1L11 = AMPP_FUNCTION(HB1_state[4], HB1_state[3], C1_jtag_debug_mode_usr1);


--H1_WORD_SR[0] is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|sld_rom_sr:\ram_rom_logic_gen:name_gen:info_rom_sr|WORD_SR[0]
--operation mode is normal

H1_WORD_SR[0] = AMPP_FUNCTION(A1L5, H1_WORD_SR[1], H1L23, HB1_state[4], H3_clear_signal, VCC, H1L17);


--MB1_bypass_reg_out is allwave:u1|altsyncram:altsyncram_component|altsyncram_dpu:auto_generated|sld_mod_ram_rom:mgl_prim2|bypass_reg_out
--operation mode is normal

MB1_bypass_reg_out = AMPP_FUNCTION(A1L5, altera_internal_jtag, MB1_bypass_reg_out, C1L34, C1_CLRN_SIGNAL);


--C1L12 is sld_hub:sld_hub_inst|hub_tdo~808
--operation mode is normal

C1L12 = AMPP_FUNCTION(H1_WORD_SR[0], FB5L4, MB1_bypass_reg_out, FB5_Q[0]);


--C1L13 is sld_hub:sld_hub_inst|hub_tdo~809
--operation mode is normal

C1L13 = AMPP_FUNCTION(MB1_ram_rom_data_reg[0], FB5_Q[2], FB5_Q[1], FB5_Q[0]);


--C1L14 is sld_hub:sld_hub_inst|hub_tdo~810
--operation mode is no