?? my_ram.vhd
字號:
-- megafunction wizard: %LPM_RAM_IO%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: lpm_ram_io
-- ============================================================
-- File Name: my_ram.vhd
-- Megafunction Name(s):
-- lpm_ram_io
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 4.0 Build 214 3/25/2004 SP 1 SJ Full Version
-- ************************************************************
--Copyright (C) 1991-2004 Altera Corporation
--Any megafunction design, and related netlist (encrypted or decrypted),
--support information, device programming or simulation file, and any other
--associated documentation or information provided by Altera or a partner
--under Altera's Megafunction Partnership Program may be used only
--to program PLD devices (but not masked PLD devices) from Altera. Any
--other use of such megafunction design, netlist, support information,
--device programming or simulation file, or any other related documentation
--or information is prohibited for any other purpose, including, but not
--limited to modification, reverse engineering, de-compiling, or use with
--any other silicon devices, unless such use is explicitly licensed under
--a separate agreement with Altera or a megafunction partner. Title to the
--intellectual property, including patents, copyrights, trademarks, trade
--secrets, or maskworks, embodied in any such megafunction design, netlist,
--support information, device programming or simulation file, or any other
--related documentation or information provided by Altera or a megafunction
--partner, remains with Altera, the megafunction partner, or their respective
--licensors. No other licenses, including any licenses needed under any third
--party's intellectual property, are provided herein.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY lpm;
USE lpm.lpm_components.all;
ENTITY my_ram IS
PORT
(
address : IN STD_LOGIC_VECTOR (10 DOWNTO 0);
we : IN STD_LOGIC := '1';
inclock : IN STD_LOGIC ;
outclock : IN STD_LOGIC ;
outenab : IN STD_LOGIC := '1';
dio : INOUT STD_LOGIC_VECTOR (7 DOWNTO 0)
);
END my_ram;
ARCHITECTURE SYN OF my_ram IS
COMPONENT lpm_ram_io
GENERIC (
intended_device_family : STRING;
lpm_width : NATURAL;
lpm_widthad : NATURAL;
lpm_indata : STRING;
lpm_address_control : STRING;
lpm_outdata : STRING;
lpm_hint : STRING;
use_eab : STRING;
lpm_type : STRING
);
PORT (
outenab : IN STD_LOGIC ;
outclock : IN STD_LOGIC ;
address : IN STD_LOGIC_VECTOR (10 DOWNTO 0);
dio : INOUT STD_LOGIC_VECTOR (7 DOWNTO 0);
inclock : IN STD_LOGIC ;
we : IN STD_LOGIC
);
END COMPONENT;
BEGIN
lpm_ram_io_component : lpm_ram_io
GENERIC MAP (
intended_device_family => "ACEX1K",
lpm_width => 8,
lpm_widthad => 11,
lpm_indata => "REGISTERED",
lpm_address_control => "REGISTERED",
lpm_outdata => "REGISTERED",
lpm_hint => "MAXIMUM_DEPTH=2048",
use_eab => "ON",
lpm_type => "LPM_RAM_IO"
)
PORT MAP (
outenab => outenab,
outclock => outclock,
address => address,
inclock => inclock,
we => we,
dio => dio
);
END SYN;
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: WidthData NUMERIC "8"
-- Retrieval info: PRIVATE: WidthAddr NUMERIC "11"
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "ACEX1K"
-- Retrieval info: PRIVATE: SingleClock NUMERIC "0"
-- Retrieval info: PRIVATE: UseDQRAM NUMERIC "0"
-- Retrieval info: PRIVATE: RegData NUMERIC "1"
-- Retrieval info: PRIVATE: RegAddr NUMERIC "1"
-- Retrieval info: PRIVATE: RegOutput NUMERIC "1"
-- Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0"
-- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "1"
-- Retrieval info: PRIVATE: AclrByte NUMERIC "0"
-- Retrieval info: PRIVATE: AclrData NUMERIC "0"
-- Retrieval info: PRIVATE: WRCONTROL_ACLR_A NUMERIC "0"
-- Retrieval info: PRIVATE: AclrAddr NUMERIC "0"
-- Retrieval info: PRIVATE: AclrOutput NUMERIC "0"
-- Retrieval info: PRIVATE: Clken NUMERIC "0"
-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
-- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
-- Retrieval info: PRIVATE: RegAdd NUMERIC "1"
-- Retrieval info: PRIVATE: OutputRegistered NUMERIC "1"
-- Retrieval info: PRIVATE: BlankMemory NUMERIC "1"
-- Retrieval info: PRIVATE: MIFfilename STRING ""
-- Retrieval info: PRIVATE: UseLCs NUMERIC "0"
-- Retrieval info: PRIVATE: RAM_BLOCK_TYPE NUMERIC "4"
-- Retrieval info: PRIVATE: MAXIMUM_DEPTH NUMERIC "2048"
-- Retrieval info: PRIVATE: INIT_FILE_LAYOUT STRING "PORT_A"
-- Retrieval info: PRIVATE: DataBusSeparated NUMERIC "0"
-- Retrieval info: PRIVATE: MEGAFN_PORT_INFO_0 STRING "address;we;inclock;outclock;outenab"
-- Retrieval info: PRIVATE: MEGAFN_PORT_INFO_1 STRING "memenab;dio"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "ACEX1K"
-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "8"
-- Retrieval info: CONSTANT: LPM_WIDTHAD NUMERIC "11"
-- Retrieval info: CONSTANT: LPM_INDATA STRING "REGISTERED"
-- Retrieval info: CONSTANT: LPM_ADDRESS_CONTROL STRING "REGISTERED"
-- Retrieval info: CONSTANT: LPM_OUTDATA STRING "REGISTERED"
-- Retrieval info: CONSTANT: LPM_HINT STRING "MAXIMUM_DEPTH=2048"
-- Retrieval info: CONSTANT: USE_EAB STRING "ON"
-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_RAM_IO"
-- Retrieval info: USED_PORT: address 0 0 11 0 INPUT NODEFVAL address[10..0]
-- Retrieval info: USED_PORT: we 0 0 0 0 INPUT VCC we
-- Retrieval info: USED_PORT: inclock 0 0 0 0 INPUT NODEFVAL inclock
-- Retrieval info: USED_PORT: outclock 0 0 0 0 INPUT NODEFVAL outclock
-- Retrieval info: USED_PORT: dio 0 0 8 0 BIDIR NODEFVAL dio[7..0]
-- Retrieval info: USED_PORT: outenab 0 0 0 0 INPUT VCC outenab
-- Retrieval info: CONNECT: @address 0 0 11 0 address 0 0 11 0
-- Retrieval info: CONNECT: @we 0 0 0 0 we 0 0 0 0
-- Retrieval info: CONNECT: @inclock 0 0 0 0 inclock 0 0 0 0
-- Retrieval info: CONNECT: @outclock 0 0 0 0 outclock 0 0 0 0
-- Retrieval info: CONNECT: dio 0 0 8 0 @dio 0 0 8 0
-- Retrieval info: CONNECT: @outenab 0 0 0 0 outenab 0 0 0 0
-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
-- Retrieval info: GEN_FILE: TYPE_NORMAL my_ram.vhd TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL my_ram.inc FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL my_ram.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL my_ram.bsf TRUE FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL my_ram_inst.vhd FALSE