Readme - Compact flash monitor/debug demonstration

GENERAL DESCRIPTION:
This distribution contains hardware and software examples suitable for
operation of the the Compact Flash interface (True IDE mode) peripheral 
included in the Nios II 5.0 development kit. This peripheral's register 
map is equivalent to the compact flash interface previously posted to the 
www.niosforum.com "Tested IP" area by Microtronix. 

HARDWARE EXAMPLE DESIGNS 
Included with this distribution are several hardware example designs 
illustrating how to connect Compact Flash pins to the I/O exported from
the peripheral. The examples supplied are pre-built and tested on the
following development boards:
 - Nios Development Board, Cyclone Edition (EP1C20)
 - Nios Development Board, Cyclone II Edition (EP2C35)
 - Nios Development Board, Stratix Edition (EP1S40)
 - Nios Development Board, Stratix II ES Edition (EP2S60ES)
 
For users of the Nios Development Board, Stratix Edition (EP1S10 or EP1S10ES
Altera devices), it is suggested that you start with the EP1S40 example design
and change SOPC Builder board component & Quartus device assignment, and then
re-compile the design. Do not remove I/O assignments; the I/O assignments for 
these three development boards are identical.

In addition, the the Quartus project setting (.qsf) files included with each of
the above hardware examples includes pin-assignments for Compact Flash that you 
may easily copy to your own custom design that uses Compact Flash.

Note: Hardware example designs in Nios II 5.0 included these same pin 
assignments in each design.

SOFTWARE EXAMPLES
The software included in this package allows rudimentary IDE access to
Compact Flash, including debug routines, hot-swap capability, and 
the ability to read/write compact flash in either LBA or CHS addressing
modes. No file system support is provided, though this example would 
serve as a fine starting-point for a higher-level file-system interface.

Additional software support for the Compact Flash interface is included
in the eCOS release for Nios II 5.0, and Micrium MicroC/FS file system,
both of which have been tested with the Compact Flash interface 
peripheral. These software interfaces do NOT require the software included
with distribution, but may be used with the hardware example designs
included with this distribution.

To build the software example design, open the Nios II IDE, create a new Nios 
II C/C++ application (it is suggested that you start with a template such as 
"Hello World" or "Blank Project"), then, copy the source-files to the newly 
created project directory and "refresh" the project contents in the IDE (F5).
Following this, you may build the application. The main() routine is located
in file cf_test.c

Note: If you start with hello world, be sure to remove hello_world.c to prevent
conflicts during compilation.

REQUIREMENTS:
The example software requires an altera_avalon_cf peripheral named "cf" 
instantiated in your SOPC Builder design. In addition, the default LCD 
interface that is included in "standard" and "full_featured" Nios II example 
designs may not be used, as it shares pins with the compact flash socket. 

The hardware example designs included with this distribution conform to the
above requirements.

KNOWN ISSUES & WORKAROUNDS:
Every effort has been made to make both the Compact Flash interface peripheral
and software examples perform without flaws. However, certain known issues
may prevent Compact Flash card access. 

The following are relevant excerpts from the Nios II 5.0 errata discussing 
Compact Flash:

 - Intermittent failures while accessing Compact Flash card
 
    Nios II 5.0 includes a Compact Flash controller peripheral suitable for 
    interfacing to Compact Flash cards in True IDE mode on Nios development 
    boards. In order for True IDE mode to operate, Compact Flash cards require 
    that the "ATASEL_N" input be driven to ground during power-up.

    The Compact Flash controller peripheral includes a configurable power 
    register used to power-cycle Compact Flash cards in Nios II software 
    through a MOSFET on the Nios development boards. However, in certain 
    development boards, power to the Compact Flash card will not be turned 
    off completely during this power-cycle operation. Because of this, the 
    "ATASEL_N" pin may not be sampled during the power-cycle operation after 
    FPGA configuration when this pin is driven to ground. Instead, "ATASEL_N" 
    may be sampled by the Compact Flash card when power is first applied to 
    the development board, when I/O are not yet driven by the FPGA (before 
    FPGA configuration).

    Workaround:  If you encounter errors with Compact Flash when using the 
    Nios development boards, please try one of the following workarounds:

        * Try a different Compact Flash card -- Certain cards are more 
          susceptible to the power-cycling issue than others.

        * Modify the Nios development board -- This is recommended for 
          users who are familiar and comfortable with board-level 
          modifications. Disconnect pin 9 (ATASEL_N) on the Compact Flash 
          socket on your Nios Development Board and tie this pin to ground. 
          Note that the Compact Flash socket uses a staggered numbering on 
          the pins (starting from pin 1: 1, 26, 2, 27, ...); please refer 
          to the Compact Flash Association specification for right-angle 
          surface-mount connectors for exact specifications on this connector. 
          Caution: This will permanently enable True-IDE mode operation.

 - Compact Flash card and LCD screen do not work concurrently

    If there is a Compact Flash card inserted in the development board, the 
    LCD and other devices connected to the PROTO1 header might not work.

    Workaround: Remove the Compact Flash card to ensure proper operation of 
    the PROTO1 header, or vice versa.