Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 5.0 Build 146 04/13/2005 SJ Full Version
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    Info: Your use of Altera Corporation's design tools, logic functions 
    Info: and other software and tools, and its AMPP partner logic       
    Info: functions, and any output files any of the foregoing           
    Info: (including device programming or simulation files), and any    
    Info: associated documentation or information are expressly subject  
    Info: to the terms and conditions of the Altera Program License      
    Info: Subscription Agreement, Altera MegaCore Function License       
    Info: Agreement, or other applicable license agreement, including,   
    Info: without limitation, that your use is for the sole purpose of   
    Info: programming logic devices manufactured by Altera and sold by   
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    Info: applicable agreement for further details.
    Info: Processing started: Fri May 13 11:55:05 2005
Info: Command: quartus_tan -t c:/altera/MegaCore/ddr_ddr2_sdram-v3.2.0/system_timing/tan_arg2.tcl ddr_sdram
Info: Quartus(args): ddr_sdram
looking for 16 dq pins
Info: Started post-fitting delay annotation
Warning: Timing characteristics of device EP2C35F672C6 are preliminary
Warning: Found 190 output pins without output pin load capacitance assignment
    Warning: Pin "sram_clk" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "ssram_adsp_n" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "ssram_adv_n" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "enet_ads_n" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "enet_aen" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "txd_from_the_uart1" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "ior_n_to_the_lan91c111" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "iow_n_to_the_lan91c111" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "read_n_to_the_ext_flash" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "outputenable_n_to_the_ext_ssram" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "select_n_to_the_ext_flash" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "write_n_to_the_ext_flash" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "adsc_n_to_the_ext_ssram" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "chipenable1_n_to_the_ext_ssram" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "bwe_n_to_the_ext_ssram" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_atasel" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_we_n" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_rfu" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_iord_n" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_iowr_n" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_power" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[20]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[19]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[18]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[17]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[16]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[15]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[14]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[13]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[12]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[11]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[10]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[9]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[8]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "address_to_the_ext_ssram[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "bw_n_to_the_ext_ssram[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "bw_n_to_the_ext_ssram[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "bw_n_to_the_ext_ssram[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "bw_n_to_the_ext_ssram[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "byteenablen_to_the_lan91c111[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "byteenablen_to_the_lan91c111[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "byteenablen_to_the_lan91c111[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "byteenablen_to_the_lan91c111[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_addr[10]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_addr[9]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_addr[8]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_addr[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_addr[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_addr[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "cf_addr[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis